Narendra Singh Dhakad

According to our database, Narendra Singh Dhakad authored at least 14 papers between 2021 and 2026.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2026

ADS-IMC: Accelerating Data Sorting with In-Memory Computation.

Narendra Singh Dhakad, Santosh Kumar Vishvakarma

CoRR, May, 2026

SRAM Based Digital Custom Compute Engine for Improved Area Efficiency of AI Hardware.

Narendra Singh Dhakad, Santosh Kumar Vishvakarma

CoRR, May, 2026

First Demonstration of 28 nm Fabricated FeFET-Based Nonvolatile 6T SRAM.

Albi Mema, Simon Thomann, Narendra Singh Dhakad, Hussam Amrouch

CoRR, March, 2026

Implementation and Performance Evaluation of CMOS-integrated Memristor-driven Flip-flop Circuits.

Paras Tiwari, Narendra Singh Dhakad, Shalu Rani, Sanjay Kumar, Themis Prodromakis

CoRR, February, 2026

2025

FlexDCIM: A 400 MHz 249.1 TOPS/W 64 Kb Flexible Digital Compute-in-Memory SRAM Macro for CNN Acceleration.

Vishal Sharma, Xin Zhang, Narendra Singh Dhakad, Tony Tae-Hyoung Kim

IEEE Trans. Circuits Syst. I Regul. Pap., October, 2025

Res-DPU: Resource-shared Digital Processing-in-memory Unit for Edge-AI Workloads.

Mukul Lokhande, Narendra Singh Dhakad, Seema Chouhan, Akash Sankhe, Santosh Kumar Vishvakarma

CoRR, October, 2025

Configurable Multiport Memory Architecture for High-Speed Data Communication.

Narendra Singh Dhakad, Santosh Kumar Vishvakarma

IEEE Embed. Syst. Lett., June, 2025

2024

In-Memory Computing with 6T SRAM for Multi-operator Logic Design.

Narendra Singh Dhakad, Eshika Chittora, Gopal Raut, Vishal Sharma, Santosh Kumar Vishvakarma

Circuits Syst. Signal Process., January, 2024

SHA-CNN: Scalable Hierarchical Aware Convolutional Neural Network for Edge AI.

Narendra Singh Dhakad, Yuvnish Malhotra, Santosh Kumar Vishvakarma, Kaushik Roy

CoRR, 2024

Configurable Multi-Port Memory Architecture for High-Speed Data Communication.

Narendra Singh Dhakad, Santosh Kumar Vishvakarma

CoRR, 2024

2023

A Configurable Activation Function for Variable Bit-Precision DNN Hardware Accelerators.

Sudheer Vishwakarma, Gopal Raut, Narendra Singh Dhakad, Santosh Kumar Vishvakarma, Dhruva Ghai

Proceedings of the Internet of Things. Advances in Information and Communication Technology, 2023

2022

Data multiplexed and hardware reused architecture for deep neural network accelerator.

Gopal Raut, Anton Biasizzo, Narendra Singh Dhakad, Neha Gupta, Gregor Papa, Santosh Kumar Vishvakarma

Neurocomputing, 2022

BitMAC: Bit-Serial Computation-Based Efficient Multiply-Accumulate Unit for DNN Accelerator.

Harsh Chhajed, Gopal Raut, Narendra Singh Dhakad, Sudheer Vishwakarma, Santosh Kumar Vishvakarma

Circuits Syst. Signal Process., 2022

2021

Voltage Bootstrapped Schmitt Trigger based Radiation Hardened Latch Design for Reliable Circuits.

Neha Gupta, Nikhil Agrawal, Narendra Singh Dhakad, Ambika Prasad Shah, Santosh Kumar Vishvakarma, Patrick Girard

Proceedings of the GLSVLSI '21: Great Lakes Symposium on VLSI 2021, 2021