Suguru Tachibana

According to our database, Suguru Tachibana authored at least 1 paper in 1995.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

1995

A 2.6-ns wave-pipelined CMOS SRAM with dual-sensing-latch circuits.

Suguru Tachibana, Hisayuki Higuchi, Koichi Takasugi, Katsuro Sasaki, Toshiaki Yamanaka, Yoshinobu Nakagome

IEEE J. Solid State Circuits, April, 1995