Suil Kang

According to our database, Suil Kang authored at least 5 papers between 2024 and 2026.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2026

A 1.19-pJ/b 32-Gb/s Baud-Rate Receiver Employing 2UI Integrated Pattern-Based CDR and DFE Adaptation Without Data-Level Reference.

Suil Kang, Sinho Lee, Young-Wook Kim, Junhak Kim, Ho-Joon Shin, Haram Ju, Kwangho Lee, Kwanseo Park

IEEE J. Solid State Circuits, February, 2026

2025

A Wide-Range Inter-Wire De-Skewing for IL Warping Mitigation in Spatially Correlated Coded Signaling-Based Transceiver.

Sinho Lee, Daeun Yun, Junhak Kim, Suil Kang, Young-Wook Kim, Kwangho Lee, Haram Ju, Sanghee Lee, Kwanseo Park

IEEE Trans. Circuits Syst. I Regul. Pap., November, 2025

A 16-to-30-Gb/s 1.03-pJ/b Baud-Rate Receiver With Referenceless CDR Employing Integrated Pattern Decoding Technique in 28-nm CMOS.

Yoojin Jung, Young-Wook Kim, Sinho Lee, Suil Kang, Kwanseo Park

IEEE Trans. Circuits Syst. I Regul. Pap., November, 2025

2024

A 0.09-pJ/b/dB 28-Gb/s Digital CDR With ISI-Resistant Phase Detector.

Suil Kang, Dongwoo Kang, Sinho Lee, Minkyo Shim, Seungha Roh, Sunjin Choi, Kwanseo Park

IEEE Trans. Circuits Syst. II Express Briefs, November, 2024

A 16-30Gb/s 1.03pJ/b Referenceless Baud-Rate CDR with Integrated Pattern Decoding Technique for Fast Frequency Acquisition.

Yoojin Jung, Young-Wook Kim, Sinho Lee, Suil Kang, Kwanseo Park

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2024