Sumio Ikegawa

According to our database1, Sumio Ikegawa authored at least 5 papers between 2006 and 2016.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Article 
PhD thesis 
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Links

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Bibliography

2016
High-Speed Magnetoresistive Random-Access Memory Random Number Generator Using Error-Correcting Code.
CoRR, 2016

2010
A 64Mb MRAM with clamped-reference and adequate-reference schemes.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010

2008
A Statistical Model for Assessing the Fault Tolerance of Variable Switching Currents for a 1Gb Spin Transfer Torque Magnetoresistive Random Access Memory.
Proceedings of the 23rd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2008), 2008

2006
MRAM Write Error Categorization with QCKB.
Proceedings of the 14th IEEE International Workshop on Memory Technology, 2006

A 16Mb MRAM with FORK Wiring Scheme and Burst Modes.
Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006


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