Tetsufumi Tanamoto

According to our database1, Tetsufumi Tanamoto authored at least 12 papers between 2006 and 2018.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2018
SPICE simulation of tunnel FET aiming at 32 kHz crystal-oscillator operation.
IEICE Electron. Express, 2018

2017
Physically Unclonable Function Using an Initial Waveform of Ring Oscillators.
IEEE Trans. Circuits Syst. II Express Briefs, 2017

Physically unclonable function using initial waveform of ring oscillators on 65 nm CMOS technology.
CoRR, 2017

2016
Physically Unclonable Function using Initial Waveform of Ring Oscillators.
CoRR, 2016

High-Speed Magnetoresistive Random-Access Memory Random Number Generator Using Error-Correcting Code.
CoRR, 2016

2014
Highly reliable and low-power nonvolatile cache memory with advanced perpendicular STT-MRAM for high-performance CPU.
Proceedings of the Symposium on VLSI Circuits, 2014

2011
Scalability of spin FPGA: A Reconfigurable Architecture based on spin MOSFET
CoRR, 2011

2010
High-performance FPGA based on novel DSS-MOSFET and non-volatile configuration memory (abstract only).
Proceedings of the ACM/SIGDA 18th International Symposium on Field Programmable Gate Arrays, 2010

2009
Perspectives and Issues in 3D-IC from Designers' Point of View.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

2008
1200μm<sup>2</sup> Physical Random-Number Generators Based on SiN MOSFET for Secure Smart-Card Application.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

2006
3D Nanowire-Based Programmable Logic.
Proceedings of the 1st International ICST Conference on Nano-Networks, 2006

Si Nanocrystal MOSFET with Silicon Nitride Tunnel Insulator for High-rate Random Number Generation.
Proceedings of the 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2006


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