Sungmeen Myung
Orcid: 0000-0002-2899-5092
According to our database1,
Sungmeen Myung
authored at least 6 papers
between 2013 and 2025.
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Bibliography
2025
37.3 Monolithic in-Memory Computing Microprocessor for End-to-End DNN Inferencing in MRAM-Embedded 28nm CMOS Technology with 1.1Mb Weight Storage.
Proceedings of the IEEE International Solid-State Circuits Conference, 2025
2024
MACC-SRAM: A Multistep Accumulation Capacitor-Coupling In-Memory Computing SRAM Macro for Deep Convolutional Neural Networks.
IEEE J. Solid State Circuits, June, 2024
2023
PIMCA: A Programmable In-Memory Computing Accelerator for Energy-Efficient DNN Inference.
IEEE J. Solid State Circuits, May, 2023
2022
A 177 TOPS/W, Capacitor-based In-Memory Computing SRAM Macro with Stepwise-Charging/Discharging DACs and Sparsity-Optimized Bitcells for 4-Bit Deep Convolutional Neural Networks.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2022
2021
PIMCA: A 3.4-Mb Programmable In-Memory Computing Accelerator in 28nm for On-Chip DNN Inference.
Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021
2013
Time-Interleaved and Circuit-Shared Dual-Channel 10 b 200 MS/s 0.18 µm CMOS Analog-to-Digital Convertor.
IEEE Trans. Very Large Scale Integr. Syst., 2013