Susan Cotterell

According to our database1, Susan Cotterell authored at least 12 papers between 2002 and 2005.

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Bibliography

2005
eBlocks - an enabling technology for basic sensor based systems.
Proceedings of the Fourth International Symposium on Information Processing in Sensor Networks, 2005

System Synthesis for Networks of Programmable Blocks.
Proceedings of the 2005 Design, 2005

A logic block enabling logic configuration by non-experts in sensor networks.
Proceedings of the Extended Abstracts Proceedings of the 2005 Conference on Human Factors in Computing Systems, 2005

2004
A fast on-chip profiler memory using a pipelined binary tree.
IEEE Trans. Very Large Scale Integr. Syst., 2004

Applications and experiments with eBlocks - electronic blocks for basic sensor-based systems.
Proceedings of the First Annual IEEE Communications Society Conference on Sensor and Ad Hoc Communications and Networks, 2004

2003
Tiny instruction caches for low power embedded systems.
ACM Trans. Embed. Comput. Syst., 2003

First results with eBlocks: embedded systems building blocks.
Proceedings of the 1st IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2003

2002
Power Estimator Development for Embedded System Memory Tuning.
J. Circuits Syst. Comput., 2002

Exploiting Fixed Programs in Embedded Systems: A Loop Cache Example.
IEEE Comput. Archit. Lett., 2002

Tuning of Loop Cache Architectures to Programs in Embedded System Design.
Proceedings of the 15th International Symposium on System Synthesis (ISSS 2002), 2002

Synthesis of customized loop caches for core-based embedded systems.
Proceedings of the 2002 IEEE/ACM International Conference on Computer-aided Design, 2002

A fast on-chip profiler memory.
Proceedings of the 39th Design Automation Conference, 2002


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