Syed Ahmed Aamir

Orcid: 0000-0003-1120-866X

According to our database1, Syed Ahmed Aamir authored at least 12 papers between 2010 and 2018.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
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Links

On csauthors.net:

Bibliography

2018
Mixed-Signal Circuit Implementation of Spiking Neuron Models.
PhD thesis, 2018

An Accelerated LIF Neuronal Network Array for a Large-Scale Mixed-Signal Neuromorphic Architecture.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018

A Mixed-Signal Structured AdEx Neuron for Accelerated Neuromorphic Cores.
IEEE Trans. Biomed. Circuits Syst., 2018

Demonstrating Advantages of Neuromorphic Computation: A Pilot Study.
CoRR, 2018

A Mixed-Signal Structured AdEx Neuron for Accelerated Neuromorphic Cores.
CoRR, 2018

2017
From LIF to AdEx neuron models: Accelerated analog 65 nm CMOS implementation.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2017

2016
A highly tunable 65-nm CMOS LIF neuron for a large scale neuromorphic system.
Proceedings of the ESSCIRC Conference 2016: 42<sup>nd</sup> European Solid-State Circuits Conference, 2016

2014
1.2-V Analog Interface for a 300-MSps HD Video Digitizer in Core 65-nm CMOS.
IEEE Trans. Very Large Scale Integr. Syst., 2014

A 1.1-V Analog Multiplexer With an Adaptive Digital Clamp for CMOS Video Digitizers.
IEEE Trans. Circuits Syst. II Express Briefs, 2014

Neuromorphic circuits for Short-Term Plasticity with recovery control.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

2013
Frequency compensation of high-speed, low-voltage CMOS multistage amplifiers.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

2010
A 1.2-V pseudo-differential OTA with common-mode feedforward in 65-NM CMOS.
Proceedings of the 17th IEEE International Conference on Electronics, 2010


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