Syed Mahfuzul Aziz

Orcid: 0000-0002-9627-7594

According to our database1, Syed Mahfuzul Aziz authored at least 37 papers between 2001 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2022
Energy Economy of Households With Photovoltaic System and Battery Storage Under Time of Use Tariff With Demand Charge.
IEEE Access, 2022

2021
FlexiS - A Flexible Sensor Node Platform for the Internet of Things.
Sensors, 2021

2020
Evaluation of aggregation techniques for DOA estimation of wideband radar signals.
Proceedings of the 14th International Conference on Signal Processing and Communication Systems, 2020

Response Time Determinism in Healthcare Data Analytics Using Machine Learning.
Proceedings of the Neural Information Processing - 27th International Conference, 2020

2019
Development and Evaluation of a Novel Robotic System for Search and Rescue.
Proceedings of the Towards Autonomous Robotic Systems - 20th Annual Conference, 2019

2015
Identification of Foot Pathologies Based on Plantar Pressure Asymmetry.
Sensors, 2015

Sensor Anomaly Detection in Wireless Sensor Networks for Healthcare.
Sensors, 2015

Resource efficient LDPC decoders for multimedia communication.
Integr., 2015

2014
A Real-Time Localization System for an Endoscopic Capsule Using Magnetic Sensors.
Sensors, 2014

On Efficient Design of LDPC Decoders for Wireless Sensor Networks.
J. Networks, 2014

Guest Editorial.
J. Comput., 2014

Review of Cyber-Physical System in Healthcare.
Int. J. Distributed Sens. Networks, 2014

A real-time localization system for an endoscopic capsule.
Proceedings of the 2014 IEEE Ninth International Conference on Intelligent Sensors, 2014

2013
Guest Editorial.
J. Comput., 2013

Energy Efficient Image Transmission in Wireless Multimedia Sensor Networks.
IEEE Commun. Lett., 2013

Object extraction scheme and protocol for energy efficient image communication over wireless sensor networks.
Comput. Networks, 2013

An energy efficient image compression scheme for Wireless Sensor Networks.
Proceedings of the 2013 IEEE Eighth International Conference on Intelligent Sensors, 2013

Storage node based routing protocol for Wireless Sensor Networks.
Proceedings of the Seventh International Conference on Sensing Technology, 2013

2012
A Highly Flexible LDPC Decoder using Hierarchical Quasi-Cyclic Matrix with Layered Permutation.
J. Networks, 2012

Guest Editorial.
J. Comput., 2012

An area efficient LDPC decoder using a reduced complexity min-sum algorithm.
Integr., 2012

Efficient parallel architecture for multi-level forward discrete wavelet transform processors.
Comput. Electr. Eng., 2012

A real-time tracking system for in vivo endofunctional capsule using magnetic sensors.
Proceedings of the Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2012

2011
FPGA Implementation of a LDPC Decoder using a Reduced Complexity Message Passing Algorithm.
J. Networks, 2011

A multi-level Hierarchical Quasi-Cyclic matrix for implementation of flexible partially-parallel LDPC decoders.
Proceedings of the 2011 IEEE International Conference on Multimedia and Expo, 2011

FPGA-Based Image Processor Architecture for Wireless Multimedia Sensor Network.
Proceedings of the IEEE/IFIP 9th International Conference on Embedded and Ubiquitous Computing, 2011

2010
Effective Teaching of the Physical Design of Integrated Circuits Using Educational Tools.
IEEE Trans. Educ., 2010

Implementation of Low Density Parity Check Decoders using a New High Level Design Methodology.
J. Comput., 2010

2009
A SIM-based electronic transaction authentication system.
Comput. Syst. Sci. Eng., 2009

A cycle-accurate transaction level SystemC model for a serial communication bus.
Comput. Electr. Eng., 2009

2007
Automated Speech Discrimination using Frequency Derivative Threshold Detection.
Proceedings of the 6th Annual IEEE/ACIS International Conference on Computer and Information Science (ICIS 2007), 2007

2006
High Speed Area Efficient Multi-resolution 2-D 9/7 filter DWT Processor.
Proceedings of the IFIP VLSI-SoC 2006, 2006

Design of a Wireless Power Supply Receiver for Biomedical Applications.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

Design of an Area Efficient High-Speed Color FDWT Processor.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

2002
On C-Testability of Carry Free Dividers.
Proceedings of the 1st IEEE International Workshop on Electronic Design, 2002

A Synthesisable VHDL Model for an Easily Testable Generalised Multiplier.
Proceedings of the 1st IEEE International Workshop on Electronic Design, 2002

2001
Testing complementary pass-transistor logic circuits.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001


  Loading...