Taehee Cho

According to our database, Taehee Cho authored at least 2 papers between 2001 and 2016.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2016

A 12 bit, 2-MS/s, 0.016-mm² column-parallel readout cyclic ADC, having 50% reduced slew rate requirement due to feed-forward spike eliminator.

Saikrishna Ganta, Alfredo Tomasini, Ajay Taparia, Taehee Cho, Mandar Kulkarni, Ozan Erdogan

Proceedings of the ESSCIRC Conference 2016: 42^nd European Solid-State Circuits Conference, 2016

2001

A dual-mode NAND flash memory: 1-Gb multilevel and high-performance 512-Mb single-level modes.

Taehee Cho, Yeong-Taek Lee, Eun-Cheol Kim, Jin-Wook Lee, Sunmi Choi, Seungjae Lee, Dong-Hwan Kim, Wook-Ghee Han, Young-Ho Lim, Jae-Duk Lee, Jung-Dal Choi, Kang-Deog Suh

IEEE J. Solid State Circuits, 2001