Youngho Lim
This page is a disambiguation page, it actually contains mutiple papers from persons of the same or a similar name.
Bibliography
2012
A 21 nm High Performance 64 Gb MLC NAND Flash Memory With 400 MB/s Asynchronous Toggle DDR Interface.
IEEE J. Solid State Circuits, 2012
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012
2011
Proceedings of the IEEE International Solid-State Circuits Conference, 2011
2010
Dynamic Vpass Controlled Program Scheme and Optimized Erase Vth Control for High Program Inhibition in MLC NAND Flash Memories.
IEEE J. Solid State Circuits, 2010
IEICE Trans. Electron., 2010
A Low Power and Area Scalable High Voltage Switch Technique for Low Operation Voltage in MLC NAND Flash Memory.
IEICE Trans. Electron., 2010
2003
IEEE J. Solid State Circuits, 2003
A Workflow Management and Grid Computing Approach to Molecular Simulation-Based Bio/Nano Experiments.
Proceedings of the Computational Science - ICCS 2003, 2003
2002
IEEE J. Solid State Circuits, 2002
2001
A dual-mode NAND flash memory: 1-Gb multilevel and high-performance 512-Mb single-level modes.
IEEE J. Solid State Circuits, 2001
1996
A 117-mm<sup>2</sup> 3.3-V only 128-Mb multilevel NAND flash memory for mass storage applications.
IEEE J. Solid State Circuits, 1996
1995
IEEE J. Solid State Circuits, November, 1995
1990
Analysis of a delay-dependent priority discipline in an integrated multiclass traffic fast packet switch.
IEEE Trans. Commun., 1990
Minimum-Cost Dimensioning Model for Common Channel Signaling Networks Under Joint Performance and Reliability Constraints.
IEEE J. Sel. Areas Commun., 1990
1989
Proceedings of the Proceedings IEEE INFOCOM '89, 1989
1988
Analysis of a delay-dependent priority discipline in a multi-class traffic packet switching node.
Proceedings of the Seventh Annual Joint Conference of the IEEE Computer and Communcations Societies. Networks: Evolution or Revolution?, 1988
1986
IEEE Trans. Commun., 1986