Takashi Mitsuhashi

According to our database, Takashi Mitsuhashi authored at least 15 papers between 1977 and 2009.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2009

Usage Distribution Coverage: What Percentage of Expected Use Has Been Executed in Software Testing?

Tomohiko Takagi, Kazuya Nishimachi, Masayuki Muragishi, Takashi Mitsuhashi, Zengo Furukawa

Proceedings of the Software Engineering, 2009

2002

Foreword.

Takashi Mitsuhashi, Toshiro Akino

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2002

1998

A Clock-Gating Method for Low-Power LSI Design.

Takeshi Kitahara, Fumihiro Minami, Toshiaki Ueda, Kimiyoshi Usami, Seiichi Nishio, Masami Murakata, Takashi Mitsuhashi

Proceedings of the ASP-DAC '98, 1998

1997

Layout Driven Re-synthesis for Low Power Consumption LSIs.

Masako Murofushi, Takashi Ishioka, Masami Murakata, Takashi Mitsuhashi

Proceedings of the 34st Conference on Design Automation, 1997

1996

Switching activity analysis for sequential circuits using Boolean approximation method.

Taku Uchino, Fumihiro Minami, Masami Murakata, Takashi Mitsuhashi

Proceedings of the 1996 International Symposium on Low Power Electronics and Design, 1996

Physical design CAD in deep sub-micron era.

Takashi Mitsuhashi, Masami Murakata, Kenji Yoshida, Takahiro Aoki

Proceedings of the conference on European design automation, 1996

1995

Power and area optimization by reorganizing CMOS complex gate circuits.

M. Tachibana, S. Kurosawa, R. Nojima, Norman Kojima, Masaaki Yamada, Takashi Mitsuhashi, Nobuyuki Goto

Proceedings of the 1995 International Symposium on Low Power Design 1995, 1995

Switching activity analysis using Boolean approximation method.

Taku Uchino, Fumihiro Minami, Takashi Mitsuhashi, Nobuyuki Goto

Proceedings of the 1995 IEEE/ACM International Conference on Computer-Aided Design, 1995

Fanout-tree restructuring algorithm for post-placement timing optimization.

T. Aoki, Masami Murakata, Takashi Mitsuhashi, Nobuyuki Goto

Proceedings of the 1995 Conference on Asia Pacific Design Automation, Makuhari, Massa, Chiba, Japan, August 29, 1995

1992

Power and Ground Network Topology Optimization for Cell Based VLSIs.

Takashi Mitsuhashi, Ernest S. Kuh

Proceedings of the 29th Design Automation Conference, 1992

1990

FOLM-Planner: A New Floorplanner with a Frame Overlapping Floorplan Model Suitable for SOG (Sea-of-Gates) Type Gate Arrays.

Masako Murofushi, Masaaki Yamada, Takashi Mitsuhashi

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 1990

1987

A Resistance Calculation Algorithm and Its Application to Circuit Extraction.

Takashi Mitsuhashi, Kenji Yoshida

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1987

1982

Programs for verifying circuit connectivity of mos/lsi mask artwork.

Makoto Takashima, Takashi Mitsuhashi, Toshiaki Chiba, Kenji Yoshida

Proceedings of the 19th Design Automation Conference, 1982

1980

An integrated mask artwork analysis system.

Takashi Mitsuhashi, Toshiaki Chiba, Makoto Takashima, Kenji Yoshida

Proceedings of the 17th Design Automation Conference, 1980

1977

A layout checking system for large scale integrated circuits.

Kenji Yoshida, Takashi Mitsuhashi, Yasuo Nakada, Toshiaki Chiba, Kiyoshi Ogita, Shinji Nakatsuka

Proceedings of the 14th Design Automation Conference, 1977