Tayyeb Mahmood

Orcid: 0000-0002-8853-305X

According to our database1, Tayyeb Mahmood authored at least 13 papers between 2010 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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Links

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Bibliography

2023
On the Positional Single Error Correction and Double Error Detection in Racetrack Memories.
IEEE Access, 2023

Quickloop: An Efficient, FPGA-Accelerated Exploration of Parameterized DNN Accelerators.
Proceedings of the 32nd International Conference on Parallel Architectures and Compilation Techniques, 2023

2022
Autonomic interoperability manager: A service-oriented architecture for full-stack interoperability in the Internet-of-Things.
ICT Express, 2022

2021
Ultra-Low-Power, High-Accuracy 434 MHz Indoor Positioning System for Smart Homes Leveraging Machine Learning Models.
Entropy, 2021

On the First Three Extremum Values of Variable Sum Exdeg Index of Trees.
Complex., 2021

Multi-Modal Anomaly Detection by Using Audio and Visual Cues.
IEEE Access, 2021

2020
Towards Medical Data Interoperability Through Collaboration of Healthcare Devices.
IEEE Access, 2020

Reducing Congestion in an Intelligent Traffic System With Collaborative and Adaptive Signaling on the Edge.
IEEE Access, 2020

2015
Ensuring Cache Reliability and Energy Scaling at Near-Threshold Voltage With Macho.
IEEE Trans. Computers, 2015

2013
Fault buffers - Enabling near-true voltage scaling in variation-sensitive L1 caches.
Des. Autom. Embed. Syst., 2013

Macho: A failure model-oriented adaptive cache architecture to enable near-threshold voltage scaling.
Proceedings of the 19th IEEE International Symposium on High Performance Computer Architecture, 2013

2011
Realizing near-true voltage scaling in variation-sensitive l1 caches via fault buffers.
Proceedings of the 14th International Conference on Compilers, 2011

2010
Fine-Grained Fault Tolerance for Process Variation-Aware Caches.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2010


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