Terry P. Borer

According to our database, Terry P. Borer authored at least 4 papers between 2002 and 2006.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2006

Modular Partitioning for Incremental Compilation.

Mehrdad Eslami Dehkordi, Stephen Dean Brown, Terry P. Borer

Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006

2004

The Quartus University Interface Program: enabling advanced FPGA research.

Shawn Malhotra, Terry P. Borer, Deshanand P. Singh, Stephen Dean Brown

Proceedings of the 2004 IEEE International Conference on Field-Programmable Technology, 2004

2003

Automated Extraction of Physical Hierarchies for Performance Improvement on Programmable Logic Devices.

Deshanand P. Singh, Terry P. Borer, Stephen Dean Brown

Proceedings of the International Conference on VLSI, 2003

2002

Automatic Partitioning for Improved Placement and Routing in Complex Programmable Logic Devices.

Valavan Manohararajah, Terry P. Borer, Stephen Dean Brown, Zvonko G. Vranesic

Proceedings of the Field-Programmable Logic and Applications, 2002