Teruo Tamama

According to our database, Teruo Tamama authored at least 6 papers between 1985 and 1988.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

1988

Key Technologies for 500 MHz VLSI Test System "ULTIMATE".

Teruo Tamama, Naoaki Narumi, Taiichi Otsuji, Masao Suzuki, Tsuneta Sudo

Proceedings of the Proceedings International Test Conference 1988, 1988

1986

FINDER: A CAD System-Based Electron Beam Tester for Fault Diagnosis of VLSI Circuits.

Norio Kuji, Teruo Tamama, M. Nagatani

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1986

Integrating an Electron-Beam System into VLSI Fault Diagnosis.

Teruo Tamama, Norio Kuji

IEEE Des. Test, 1986

An Automated F-Beam Tester with CAD Interface, "Finder": A Powerful Tool for Fault Diagnosis of ASICs.

Norio Kuji, Teruo Tamama

Proceedings of the Proceedings International Test Conference 1986, 1986

1985

A Fully-Automated Electron Beam Test System for VLSI Circuits.

Norio Kuji, Teruo Tamama, Takao Yano

IEEE Des. Test, 1985

Automated Fault Diagnostic EB Tester and Its Application to a 40K-Gate VLSI Circuit.

Norio Kuji, Teruo Tamama

Proceedings of the Proceedings International Test Conference 1985, 1985