Tianji Liu

Orcid: 0009-0003-2204-280X

According to our database1, Tianji Liu authored at least 11 papers between 2022 and 2026.

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Timeline

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Bibliography

2026
Efficient and Effective E-graph-based Logic Optimization.
ACM Trans. Design Autom. Electr. Syst., March, 2026

2025
A Unified Parallel Framework for LUT Mapping and Logic Optimization.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., January, 2025

ExactMap: Enhancing Delay Optimization in Parallel ASIC Technology Mapping.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2025

Simulation-based Parallel Sweeping: A New Perspective on Combinational Equivalence Checking.
Proceedings of the 62nd ACM/IEEE Design Automation Conference, 2025

2024
Parmesan: Efficient Partitioning and Mapping Flow for DNN Training on General Device Topology.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., August, 2024

Improving Physical Layer Security with RIS-Assisted Symbiotic Radio.
Proceedings of the IEEE International Conference on Communications, 2024

On Advanced Methodologies for Microarchitecture Design Space Exploration.
Proceedings of the Great Lakes Symposium on VLSI 2024, 2024

Massively Parallel AIG Resubstitution.
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

FineMap: A Fine-grained GPU-parallel LUT Mapping Engine.
Proceedings of the 29th Asia and South Pacific Design Automation Conference, 2024

2023
Rethinking AIG Resynthesis in Parallel.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

2022
NovelRewrite: node-level parallel AIG rewriting.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022


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