Martin D. F. Wong
Orcid: 0000-0001-8274-9688Affiliations:
- Hong Kong Baptist University, Hong Kong
- University of Illinois at Urbana-Champaign, IL, USA (former)
- University of Texas at Austin, TX, USA (former)
- University of Illinois at Urbana-Champaign, IL, USA (PhD 1987)
According to our database1,
Martin D. F. Wong
authored at least 437 papers
between 1986 and 2024.
Collaborative distances:
Collaborative distances:
Awards
ACM Fellow
ACM Fellow 2017, "For contributions to the algorithmic aspects of electronic design automation (EDA)".
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
Online presence:
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on zbmath.org
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on hkbu.edu.hk
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on orcid.org
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on dl.acm.org
On csauthors.net:
Bibliography
2024
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., September, 2024
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., July, 2024
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., June, 2024
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., March, 2024
ACM Trans. Design Autom. Electr. Syst., January, 2024
Proceedings of the 2024 International Symposium on Physical Design, 2024
Routing-aware Legal Hybrid Bonding Terminal Assignment for 3D Face-to-Face Stacked ICs.
Proceedings of the 2024 International Symposium on Physical Design, 2024
Dynamic Multi-FPGA Prototyping Platforms with Simultaneous Networking, Placement and Routing.
Proceedings of the Great Lakes Symposium on VLSI 2024, 2024
Proceedings of the Great Lakes Symposium on VLSI 2024, 2024
ControLayout: Conditional Diffusion for Style-Controllable and Violation-Fixable Layout Pattern Generation.
Proceedings of the Great Lakes Symposium on VLSI 2024, 2024
Proceedings of the 29th Asia and South Pacific Design Automation Conference, 2024
Proceedings of the Thirty-Eighth AAAI Conference on Artificial Intelligence, 2024
2023
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., November, 2023
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., October, 2023
CTM-SRAF: Continuous Transmission Mask-Based Constraint-Aware Subresolution Assist Feature Generation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., October, 2023
DRC-SG 2.0: Efficient Design Rule Checking Script Generation via Key Information Extraction.
ACM Trans. Design Autom. Electr. Syst., September, 2023
Boosting VLSI Design Flow Parameter Tuning with Random Embedding and Multi-objective Trust-region Bayesian Optimization.
ACM Trans. Design Autom. Electr. Syst., September, 2023
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., September, 2023
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., February, 2023
LithoBench: Benchmarking AI Computational Lithography for Semiconductor Manufacturing.
Proceedings of the Advances in Neural Information Processing Systems 36: Annual Conference on Neural Information Processing Systems 2023, 2023
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023
IT-DSE: Invariance Risk Minimized Transfer Microarchitecture Design Space Exploration.
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023
Proceedings of the Great Lakes Symposium on VLSI 2023, 2023
Proceedings of the Great Lakes Symposium on VLSI 2023, 2023
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
Proceedings of the 15th IEEE International Conference on ASIC, 2023
2022
Proceedings of the 2022 ACM/IEEE Workshop on Machine Learning for CAD, 2022
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022
WaferHSL: Wafer Failure Pattern Classification with Efficient Human-Like Staged Learning.
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022
Behavioral Synthesis for Hardware Security, 2022
2021
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021
TopoPart: a Multi-level Topology-Driven Partitioning Framework for Multi-FPGA Systems.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021
2020
On Coloring Rectangular and Diagonal Grid Graphs for Multipatterning and DSA Lithography.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
Proceedings of the 26th IEEE International Conference on Parallel and Distributed Systems, 2020
Proceedings of the 38th IEEE International Conference on Computer Design, 2020
An Efficient Critical Path Generation Algorithm Considering Extensive Path Constraints.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020
2019
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019
Proceedings of the 27th ACM International Conference on Multimedia, 2019
Proceedings of the 2019 IEEE International Parallel and Distributed Processing Symposium, 2019
Proceedings of the 2019 IEEE High Performance Extreme Computing Conference, 2019
Proceedings of the 56th Annual Design Automation Conference 2019, 2019
Proceedings of the 56th Annual Design Automation Conference 2019, 2019
2018
Proceedings of the 2018 ACM Multimedia Conference on Multimedia Conference, 2018
Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018
Proceedings of the 19th International Symposium on Quality Electronic Design, 2018
Proceedings of the 2018 on Great Lakes Symposium on VLSI, 2018
Proceedings of the 12th ACM International Conference on Distributed and Event-based Systems, 2018
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
A highly compressed timing macro-modeling algorithm for hierarchical and incremental timing analysis.
Proceedings of the 23rd Asia and South Pacific Design Automation Conference, 2018
On coloring rectangular and diagonal grid graphs for multiple patterning lithography.
Proceedings of the 23rd Asia and South Pacific Design Automation Conference, 2018
2017
Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017
LibAbs: An Efficient and Accurate Timing Macro-Modeling Algorithm for Large Hierarchical Designs.
Proceedings of the 54th Annual Design Automation Conference, 2017
Proceedings of the 28th IEEE International Conference on Application-specific Systems, 2017
2016
Encyclopedia of Algorithms, 2016
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016
Performance evaluation considering mask misalignment in multiple patterning decomposition.
Proceedings of the 17th International Symposium on Quality Electronic Design, 2016
Proceedings of the 2016 on International Symposium on Physical Design, 2016
Proceedings of the 53rd Annual Design Automation Conference, 2016
Proceedings of the 53rd Annual Design Automation Conference, 2016
Contact layer decomposition to enable DSA with multi-patterning technique for standard cell based layout.
Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016
2015
Comput. Electr. Eng., 2015
On fast timing closure: speeding up incremental path-based timing analysis with mapreduce.
Proceedings of the 2015 ACM/IEEE International Workshop on System Level Interconnect Prediction, 2015
Proceedings of the 2015 Symposium on International Symposium on Physical Design, ISPD 2015, Monterey, CA, USA, March 29, 2015
Proceedings of the 2015 Symposium on International Symposium on Physical Design, ISPD 2015, Monterey, CA, USA, March 29, 2015
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015
Layout optimization and template pattern verification for directed self-assembly (DSA).
Proceedings of the 52nd Annual Design Automation Conference, 2015
Contact pitch and location prediction for Directed Self-Assembly template verification.
Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015
Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015
Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015
2014
Proceedings of the ACM/IEEE International Workshop on System Level Interconnect Prediction, 2014
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2014
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2014
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2014
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014
Proceedings of the 51st Annual Design Automation Conference 2014, 2014
Proceedings of the 51st Annual Design Automation Conference 2014, 2014
Proceedings of the 2014 International Conference on Hardware/Software Codesign and System Synthesis, 2014
Efficient simulation-based optimization of power grid with on-chip voltage regulator.
Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014
CNPUF: A Carbon Nanotube-based Physically Unclonable Function for secure low-energy hardware design.
Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014
2013
ACM Trans. Design Autom. Electr. Syst., 2013
A Polynomial Time Exact Algorithm for Overlay-Resistant Self-Aligned Double Patterning (SADP) Layout Decomposition.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013
Proceedings of the International Symposium on Quality Electronic Design, 2013
Proceedings of the International Symposium on Quality Electronic Design, 2013
Optimally minimizing overlay violation in self-aligned double patterning decomposition for row-based standard cell layout in polynomial time.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013
Constrained pattern assignment for standard cell based triple patterning lithography.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013
Block copolymer directed self-assembly (DSA) aware contact layer optimization for 10 nm 1D standard cell library.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013
Spacer-is-dielectric-compliant detailed routing for self-aligned double patterning lithography.
Proceedings of the 50th Annual Design Automation Conference 2013, 2013
Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013
Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013
Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013
Proceedings of the American Control Conference, 2013
2012
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012
NP-Completeness and an Approximation Algorithm for Rectangle Escape Problem With Application to PCB Routing.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012
A Practical Low-Power Nonregular Interconnect Design With Manufacturing for Design Approach.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2012
Impact of lithography retargeting process on low level interconnect in 20nm technology.
Proceedings of the International Workshop on System Level Interconnect Prediction, 2012
Proceedings of the Thirteenth International Symposium on Quality Electronic Design, 2012
Proceedings of the Thirteenth International Symposium on Quality Electronic Design, 2012
A polynomial time exact algorithm for self-aligned double patterning layout decomposition.
Proceedings of the International Symposium on Physical Design, 2012
Proceedings of the International Symposium on Physical Design, 2012
Proceedings of the 2012 IEEE/ACM International Conference on Computer-Aided Design, 2012
Proceedings of the 2012 IEEE/ACM International Conference on Computer-Aided Design, 2012
Proceedings of the 2012 IEEE/ACM International Conference on Computer-Aided Design, 2012
Proceedings of the 2012 IEEE/ACM International Conference on Computer-Aided Design, 2012
Triple patterning aware routing and its comparison with double patterning aware routing in 14nm technology.
Proceedings of the 49th Annual Design Automation Conference 2012, 2012
Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012
Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012
Hybrid lithography optimization with E-Beam and immersion processes for 16nm 1D gridded design.
Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012
2011
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011
Proceedings of the 12th International Symposium on Quality Electronic Design, 2011
Proceedings of the 2011 IEEE/ACM International Conference on Computer-Aided Design, 2011
Self-aligned double patterning decomposition for overlay minimization and hot spot detection.
Proceedings of the 48th Design Automation Conference, 2011
Proceedings of the 48th Design Automation Conference, 2011
Mask cost reduction with circuit performance consideration for self-aligned double patterning.
Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011
Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011
A provably good approximation algorithm for Rectangle Escape Problem with application to PCB routing.
Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011
2010
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010
Proceedings of the International Workshop on System Level Interconnect Prediction Workshop, 2010
Fast block-iterative domain decomposition algorithm for IR drop analysis in large power grid.
Proceedings of the 11th International Symposium on Quality of Electronic Design (ISQED 2010), 2010
Proceedings of the 11th International Symposium on Quality of Electronic Design (ISQED 2010), 2010
Proceedings of the 2010 International Symposium on Physical Design, 2010
Proceedings of the 28th International Conference on Computer Design, 2010
Proceedings of the 2010 International Conference on Computer-Aided Design, 2010
Proceedings of the 2010 International Conference on Computer-Aided Design, 2010
Proceedings of the 47th Design Automation Conference, 2010
An optimal algorithm for finding disjoint rectangles and its application to PCB routing.
Proceedings of the 47th Design Automation Conference, 2010
Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010
Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010
Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010
Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010
2009
ACM Trans. Design Autom. Electr. Syst., 2009
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009
Proceedings of the 2009 International Symposium on Physical Design, 2009
Proceedings of the 2009 International Conference on Computer-Aided Design, 2009
Proceedings of the 46th Design Automation Conference, 2009
Proceedings of the 46th Design Automation Conference, 2009
Proceedings of the 46th Design Automation Conference, 2009
Proceedings of the 14th Asia South Pacific Design Automation Conference, 2009
2008
Proceedings of the Handbook of Algorithms for Physical Design Automation., 2008
Proceedings of the Handbook of Algorithms for Physical Design Automation., 2008
Proceedings of the Encyclopedia of Algorithms - 2008 Edition, 2008
ACM Trans. Design Autom. Electr. Syst., 2008
Optimal routing algorithms for rectilinear pin clusters in high-density multichip modules.
ACM Trans. Design Autom. Electr. Syst., 2008
A fast simultaneous input vector generation and gate replacement algorithm for leakage power reduction.
ACM Trans. Design Autom. Electr. Syst., 2008
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008
Is Your Layout-Density Verification Exact? - A Fast Exact Deep Submicrometer Density Calculation Algorithm.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008
Proceedings of the 9th International Symposium on Quality of Electronic Design (ISQED 2008), 2008
Proceedings of the 2008 International Conference on Computer-Aided Design, 2008
Efficient ASIP design for configurable processors with fine-grained resource sharing.
Proceedings of the ACM/SIGDA 16th International Symposium on Field Programmable Gate Arrays, 2008
Proceedings of the 13th Asia South Pacific Design Automation Conference, 2008
2007
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007
Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007
Proceedings of the 2007 International Symposium on Physical Design, 2007
Is your layout density verification exact?: a fast exact algorithm for density calculation.
Proceedings of the 2007 International Symposium on Physical Design, 2007
Proceedings of the 2007 International Conference on Computer-Aided Design, 2007
Proceedings of the 2007 International Conference on Computer-Aided Design, 2007
Proceedings of the 2007 International Conference on Computer-Aided Design, 2007
Timing constraint-driven technology mapping for FPGAs considering false paths and multi-clock domains.
Proceedings of the 2007 International Conference on Computer-Aided Design, 2007
Proceedings of the 44th Design Automation Conference, 2007
Proceedings of the 44th Design Automation Conference, 2007
Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007
Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007
Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007
Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007
2006
ACM Trans. Design Autom. Electr. Syst., 2006
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006
Proceedings of the 43rd Design Automation Conference, 2006
A fast simultaneous input vector generation and gate replacement algorithm for leakage power reduction.
Proceedings of the 43rd Design Automation Conference, 2006
Closed form solution for optimal buffer sizing using the Weierstrass elliptic function.
Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006
Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006
2005
ACM Trans. Design Autom. Electr. Syst., 2005
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005
Proceedings of the 2005 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2005), 2005
Proceedings of the 6th International Symposium on Quality of Electronic Design (ISQED 2005), 2005
Proceedings of the 6th International Symposium on Quality of Electronic Design (ISQED 2005), 2005
Proceedings of the 6th International Symposium on Quality of Electronic Design (ISQED 2005), 2005
Proceedings of the 2005 International Conference on Computer-Aided Design, 2005
Proceedings of the 2005 International Conference on Computer-Aided Design, 2005
Proceedings of the 2005 International Conference on Computer-Aided Design, 2005
Proceedings of the 2005 International Conference on Computer-Aided Design, 2005
Proceedings of the 2005 International Conference on Computer-Aided Design, 2005
Energy optimization in memory address bus structure for application-specific systems.
Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, 2005
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005
2004
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004
A polynomial time-optimal diode insertion/routing algorithm for fixing antenna problem [IC layout].
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004
Proceedings of the 2004 International Symposium on Physical Design, 2004
Proceedings of the Logic Programming, 20th International Conference, 2004
Proceedings of the 22nd IEEE International Conference on Computer Design: VLSI in Computers & Processors (ICCD 2004), 2004
Proceedings of the 22nd IEEE International Conference on Computer Design: VLSI in Computers & Processors (ICCD 2004), 2004
Proceedings of the 22nd IEEE International Conference on Computer Design: VLSI in Computers & Processors (ICCD 2004), 2004
Proceedings of the 2004 International Conference on Computer-Aided Design, 2004
Proceedings of the 2004 International Conference on Computer-Aided Design, 2004
Proceedings of the 2004 International Conference on Computer-Aided Design, 2004
Proceedings of the 2004 Design, 2004
Proceedings of the 41th Design Automation Conference, 2004
Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, 2004
Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, 2004
2003
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2003
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2003
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2003
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2003
Proceedings of the 2003 International Symposium on Physical Design, 2003
Proceedings of the 2003 International Conference on Computer-Aided Design, 2003
Proceedings of the 2003 International Conference on Computer-Aided Design, 2003
Proceedings of the 2003 International Conference on Computer-Aided Design, 2003
Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2003
Proceedings of the 2003 Design, 2003
Proceedings of the 40th Design Automation Conference, 2003
Proceedings of the 2003 Asia and South Pacific Design Automation Conference, 2003
Proceedings of the 2003 Asia and South Pacific Design Automation Conference, 2003
2002
Simultaneous Buffer-sizing and Wire-sizing for Clock Trees Based on Lagrangian Relaxation.
VLSI Design, 2002
Dummy-feature placement for chemical-mechanical polishinguniformity in a shallow-trench isolation process.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2002
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2002
Proceedings of the 2002 IEEE/ACM International Conference on Computer-aided Design, 2002
Proceedings of the 2002 IEEE/ACM International Conference on Computer-aided Design, 2002
Proceedings of the 2002 IEEE/ACM International Conference on Computer-aided Design, 2002
Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2002
A Polynomial Time Optimal Diode Insertion/Routing Algorithm for Fixing Antenna Problem.
Proceedings of the 2002 Design, 2002
Proceedings of the 39th Design Automation Conference, 2002
2001
ACM Trans. Design Autom. Electr. Syst., 2001
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001
Model-based dummy feature placement for oxide chemical-mechanicalpolishing manufacturability.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001
Fast evaluation of sequence pair in block placement by longestcommon subsequence computation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001
Ann. Oper. Res., 2001
Dummy feature placement for chemical-mechanical polishing uniformity in a shallow trench isolation process.
Proceedings of the 2001 International Symposium on Physical Design, 2001
Proceedings of the 2001 IEEE/ACM International Conference on Computer-Aided Design, 2001
A New Algorithm for Routing Tree Construction with Buffer Insertion and Wire Sizing under Obstacle Constraints.
Proceedings of the 2001 IEEE/ACM International Conference on Computer-Aided Design, 2001
Proceedings of the 11th ACM Great Lakes Symposium on VLSI 2001, 2001
Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2001
Proceedings of the Conference on Design, Automation and Test in Europe, 2001
Proceedings of the Conference on Design, Automation and Test in Europe, 2001
Proceedings of ASP-DAC 2001, 2001
Proceedings of ASP-DAC 2001, 2001
Proceedings of ASP-DAC 2001, 2001
2000
ACM Trans. Design Autom. Electr. Syst., 2000
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000
Proceedings of the 2000 International Symposium on Physical Design, 2000
Zero-skew clock tree construction by simultaneous routing, wire sizing and buffer insertion.
Proceedings of the 2000 International Symposium on Physical Design, 2000
Fast Evaluation of Sequence Pair in Block Placement by Longest Common Subsequence Computation.
Proceedings of the 2000 Design, 2000
Proceedings of the 2000 Design, 2000
Wire-Sizing for Delay Minimization and Ringing Control Using Transmission Line Model.
Proceedings of the 2000 Design, 2000
Proceedings of the 37th Conference on Design Automation, 2000
Model-based dummy feature placement for oxide chemical-mechanical polishing manufacturability.
Proceedings of the 37th Conference on Design Automation, 2000
Proceedings of the Computational Logic, 2000
1999
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999
Wire-sizing optimization with inductance consideration using transmission-line model.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999
A quadratic programming approach to simultaneous buffer insertion/sizing and wire sizing.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999
Shaping a VLSI wire to minimize Elmore delay with consideration of coupling capacitance.
Integr., 1999
Proceedings of the 1999 International Symposium on Physical Design, 1999
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999
An Efficient Buffer Insertion Algorithm for Large Networks Based on Lagrangian Relaxation.
Proceedings of the IEEE International Conference On Computer Design, 1999
An Exact Tree-Based Structural Technology Mapping Algorithm for Configurable Logic Blocks in FPGAs.
Proceedings of the IEEE International Conference On Computer Design, 1999
Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided Design, 1999
A graph theoretic optimal algorithm for schedule compression in time-multiplexed FPGA partitioning.
Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided Design, 1999
Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided Design, 1999
Proceedings of the 1999 ACM/SIGDA Seventh International Symposium on Field Programmable Gate Arrays, 1999
Proceedings of the 36th Conference on Design Automation, 1999
Proceedings of the 36th Conference on Design Automation, 1999
Proceedings of the 1999 Conference on Asia South Pacific Design Automation, 1999
Optimal Wire Shape with Consideration of Coupling Capacitance under Elmore Delay Model.
Proceedings of the 1999 Conference on Asia South Pacific Design Automation, 1999
1998
VLSI Design, 1998
ACM Trans. Design Autom. Electr. Syst., 1998
Switch bound allocation for maximizing routability in timing-driven routing of FPGA's.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1998
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1998
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1998
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1998
Proceedings of the International Conference on Computer Design: VLSI in Computers and Processors, 1998
Proceedings of the International Conference on Computer Design: VLSI in Computers and Processors, 1998
Proceedings of the 1998 IEEE/ACM International Conference on Computer-Aided Design, 1998
Proceedings of the 1998 IEEE/ACM International Conference on Computer-Aided Design, 1998
Proceedings of the 1998 IEEE/ACM International Conference on Computer-Aided Design, 1998
Proceedings of the 1998 IEEE/ACM International Conference on Computer-Aided Design, 1998
Proceedings of the 1998 ACM/SIGDA Sixth International Symposium on Field Programmable Gate Arrays, 1998
Proceedings of the 1998 ACM/SIGDA Sixth International Symposium on Field Programmable Gate Arrays, 1998
Proceedings of the 1998 Design, 1998
Proceedings of the 35th Conference on Design Automation, 1998
1997
ACM Trans. Design Autom. Electr. Syst., 1997
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997
Algorithms for an FPGA switch module routing problem with application to global routing.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997
Proceedings of the 1997 International Symposium on Physical Design, 1997
Proceedings of the 1997 International Symposium on Physical Design, 1997
Proceedings of the Proceedings 1997 International Conference on Computer Design: VLSI in Computers & Processors, 1997
Proceedings of the Proceedings 1997 International Conference on Computer Design: VLSI in Computers & Processors, 1997
Proceedings of the Proceedings 1997 International Conference on Computer Design: VLSI in Computers & Processors, 1997
Proceedings of the Proceedings 1997 International Conference on Computer Design: VLSI in Computers & Processors, 1997
Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, 1997
Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, 1997
Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, 1997
A Fast And Accurate Technique To Optimize Characterization Tables For Logic Synthesis.
Proceedings of the 34st Conference on Design Automation, 1997
Proceedings of the 34st Conference on Design Automation, 1997
1996
ACM Trans. Design Autom. Electr. Syst., 1996
ACM Trans. Design Autom. Electr. Syst., 1996
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1996
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1996
Integr., 1996
Proceedings of the 1996 International Conference on Computer Design (ICCD '96), 1996
Proceedings of the 1996 IEEE/ACM International Conference on Computer-Aided Design, 1996
Proceedings of the 1996 IEEE/ACM International Conference on Computer-Aided Design, 1996
Proceedings of the 1996 Fourth International Symposium on Field Programmable Gate Arrays, 1996
Proceedings of the 1996 Fourth International Symposium on Field Programmable Gate Arrays, 1996
Proceedings of the 1996 European Design and Test Conference, 1996
Proceedings of the 33st Conference on Design Automation, 1996
Proceedings of the 33st Conference on Design Automation, 1996
Fast Performance-Driven Optimization for Buffered Clock Trees Based on Lagrangian Relaxation.
Proceedings of the 33st Conference on Design Automation, 1996
1995
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1995
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1995
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1995
An Optimal Layer Assignment Algorithm for Minimizing Crosstalk for Three Layer VHV Channel Routing.
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995
Proceedings of the 1995 International Conference on Computer Design (ICCD '95), 1995
Proceedings of the 1995 International Conference on Computer Design (ICCD '95), 1995
Proceedings of the 1995 International Conference on Computer Design (ICCD '95), 1995
Proceedings of the 1995 IEEE/ACM International Conference on Computer-Aided Design, 1995
Proceedings of the 1995 IEEE/ACM International Conference on Computer-Aided Design, 1995
Proceedings of the 1995 IEEE/ACM International Conference on Computer-Aided Design, 1995
Proceedings of the Third International ACM Symposium on Field-Programmable Gate Arrays, 1995
1994
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1994
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994
Edge-map: optimal performance driven technology mapping for iterative LUT based FPGA designs.
Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994
Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994
Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994
Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994
Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994
Proceedings of the Proceedings EURO-DAC'94, 1994
Switch Bound Allocation for Maximizing Routability in Timing-Driven Routing of FPGAs.
Proceedings of the 31st Conference on Design Automation, 1994
1993
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1993
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1993
A Graph Partitioning Problem for Multiple-chip Design.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993
On optimal approximation of orthogonal polygons.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993
Proceedings of the 1993 IEEE/ACM International Conference on Computer-Aided Design, 1993
Proceedings of the European Design Automation Conference 1993, 1993
Proceedings of the European Design Automation Conference 1993, 1993
Proceedings of the European Design Automation Conference 1993, 1993
Proceedings of the 30th Design Automation Conference. Dallas, 1993
Proceedings of the 30th Design Automation Conference. Dallas, 1993
Proceedings of the Algorithmic Aspects of VLSI Layout, 1993
1992
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1992
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1992
Proceedings of the Proceedings 1992 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1992
Proceedings of the 1992 IEEE/ACM International Conference on Computer-Aided Design, 1992
Proceedings of the 29th Design Automation Conference, 1992
1991
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1991
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1991
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1991
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1991
Proceedings of the Proceedings 1991 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1991
Proceedings of the Proceedings 1991 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1991
Proceedings of the 1991 IEEE/ACM International Conference on Computer-Aided Design, 1991
Proceedings of the 1991 IEEE/ACM International Conference on Computer-Aided Design, 1991
Proceedings of the conference on European design automation, 1991
Proceedings of the 28th Design Automation Conference, 1991
Proceedings of the 28th Design Automation Conference, 1991
1990
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 1990
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 1990
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 1990
Proceedings of the European Design Automation Conference, 1990
Proceedings of the 27th ACM/IEEE Design Automation Conference. Orlando, 1990
Proceedings of the 27th ACM/IEEE Design Automation Conference. Orlando, 1990
1989
Proceedings of the 1989 IEEE International Conference on Computer-Aided Design, 1989
Proceedings of the 26th ACM/IEEE Design Automation Conference, 1989
Proceedings of the 26th ACM/IEEE Design Automation Conference, 1989
1988
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1988
Proceedings of the 1988 IEEE International Conference on Computer-Aided Design, 1988
Proceedings of the 1988 IEEE International Conference on Computer-Aided Design, 1988
Proceedings of the 25th ACM/IEEE Conference on Design Automation, 1988
1987
PhD thesis, 1987
Proceedings of the 24th ACM/IEEE Design Automation Conference. Miami Beach, FL, USA, June 28, 1987
1986
Proceedings of the 23rd ACM/IEEE Design Automation Conference. Las Vegas, 1986