Tianyou Bao
Orcid: 0000-0003-3321-5123
According to our database1,
Tianyou Bao
authored at least 23 papers
between 2018 and 2025.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2025
CHIRP: Compact and High-Performance FPGA Implementation of Unified Hardware Accelerators for Ring-Binary-LWE-based PQC.
ACM Trans. Reconfigurable Technol. Syst., June, 2025
High-Performance Instruction-Set Hardware Accelerator for Ring-Binary-LWE-Based Lightweight PQC.
IEEE Trans. Very Large Scale Integr. Syst., May, 2025
HSPA: High-Throughput Sparse Polynomial Multiplication for Code-based Post-Quantum Cryptography.
ACM Trans. Embed. Comput. Syst., January, 2025
LTE: Lightweight and Timing-Efficient Unequal-Sized Polynomial Multiplication Accelerators.
IEEE Trans. Circuits Syst. II Express Briefs, January, 2025
Proceedings of the IEEE International Symposium on Circuits and Systems, 2025
2024
FELIX: FPGA-Based Scalable and Lightweight Accelerator for Large Integer Extended GCD.
IEEE Trans. Very Large Scale Integr. Syst., September, 2024
IEEE Trans. Very Large Scale Integr. Syst., May, 2024
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2024
FELIX (XGCD for FALCON): FPGA-based Scalable and Lightweight Accelerator for Large Integer Extended GCD.
IACR Cryptol. ePrint Arch., 2024
SCALES: SCALable and Area-Efficient Systolic Accelerator for Ternary Polynomial Multiplication.
IEEE Comput. Archit. Lett., 2024
HELP: Highly Efficient and Low-Latency Hardware Accelerator for Integer Polynomial Multiplication.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2024
Invited Paper: Enhancing Privacy-Preserving Computing with Optimized CKKS Encryption: A Hardware Acceleration Approach.
Proceedings of the 43rd IEEE/ACM International Conference on Computer-Aided Design, 2024
2023
FPGA Implementation of Compact Hardware Accelerators for Ring-Binary-LWE-based Post-quantum Cryptography.
ACM Trans. Reconfigurable Technol. Syst., September, 2023
COPMA: Compact and Optimized Polynomial Multiplier Accelerator for High-Performance Implementation of LWR-Based PQC.
IEEE Trans. Very Large Scale Integr. Syst., April, 2023
AEKA: FPGA Implementation of Area-Efficient Karatsuba Accelerator for Ring-Binary-LWE-based Lightweight PQC.
Proceedings of the International Conference on Field Programmable Technology, 2023
Efficient Implementation of Ring-Binary-LWE-based Lightweight PQC Accelerator on the FPGA Platform.
Proceedings of the 31st IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2023
Proceedings of the 57th Asilomar Conference on Signals, Systems, and Computers, ACSSC 2023, Pacific Grove, CA, USA, October 29, 2023
2022
Efficient Hardware Arithmetic for Inverted Binary Ring-LWE Based Post-Quantum Cryptography.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022
Proceedings of the IEEE 40th International Conference on Computer Design, 2022
Systolic Acceleration of Polynomial Multiplication for KEM Saber and Binary Ring-LWE Post-Quantum Cryptography.
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2022
Ultra Low-Complexity Implementation of Binary Ring-LWE based Post-Quantum Cryptography on FPGA Platform.
Proceedings of the FPGA '22: The 2022 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Virtual Event, USA, 27 February 2022, 2022
Work-in-Progress: High-Performance Systolic Hardware Accelerator for RBLWE-based Post-Quantum Cryptography.
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2022
2018
Proceedings of the IEEE International Conference on Bioinformatics and Biomedicine, 2018