Tom W. Williams

According to our database1, Tom W. Williams authored at least 8 papers between 1982 and 1991.

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Bibliography

1991
Iterative algorithms for computing aliasing probabilities.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1991

1988
Bounds and analysis of aliasing errors in linear feedback shift registers.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1988

TRIM: testability range by ignoring the memory.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1988

1987
Aliasing Errors in Signature Analysis Registers.
IEEE Des. Test, 1987

1986
Comparison of Aliasing Errors for Primitive and Non-Primitive Polynomials.
Proceedings of the Proceedings International Test Conference 1986, 1986

1984
Sufficient Testing In A Self-Testing Environment.
Proceedings of the Proceedings International Test Conference 1984, 1984

Chip partitioning aid: A design technique for partitionability and testability in VLSI.
Proceedings of the 21st Design Automation Conference, 1984

1982
A Variation of LSSD and Its Implications on Design and Test Pattern Generation in VLSI.
Proceedings of the Proceedings International Test Conference 1982, 1982


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