Tomás Bautista

Orcid: 0000-0002-5368-3680

According to our database1, Tomás Bautista authored at least 20 papers between 1999 and 2021.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

Online presence:

On csauthors.net:

Bibliography

2021
Application of NSGA-II to Obtain the Charging Current-Time Tradeoff Curve in Battery Based Underwater Wireless Sensor Nodes.
Sensors, 2021

A New Method for Gaining the Control of Standalone Underwater Sensor Nodes Based on Power Supply Sensing.
Sensors, 2021

A Novel Charging Method for Underwater Batteryless Sensor Node Networks.
Sensors, 2021

2020
Design of a Practical Underwater Sensor Network for Offshore Fish Farm Cages.
Sensors, 2020

From operculum and body tail movements to different coupling of physical activity and respiratory frequency in farmed gilthead sea bream and European sea bass. Insights on aquaculture biosensing.
Comput. Electron. Agric., 2020

2014
Analysis and optimization of dynamically reconfigurable regenerative comparators for ultra-low power 6-bit TC-ADCs in 90 nm CMOS technologies.
Microelectron. J., 2014

A two-phase design space exploration strategy for system-level real-time application mapping onto MPSoC.
Microprocess. Microsystems, 2014

2013
A system-level infrastructure for multidimensional MP-SoC design space co-exploration.
ACM Trans. Embed. Comput. Syst., 2013

2010
NASA: A generic infrastructure for system-level MP-SoC design space exploration.
Proceedings of the 8th IEEE Workshop on Embedded Systems for Real-Time Multimedia, 2010

2009
Real-time visual tracking system modelling in MPSoC using platform based design.
Proceedings of the Real-Time Image and Video Processing 2009, 2009

2008
Design Space Exploration and Performance Analysis for the Modular Design of CVS in a Heterogeneous MPSoC.
Proceedings of the ReConFig'08: 2008 International Conference on Reconfigurable Computing and FPGAs, 2008

2007
Towards a configurable SoC MPEG-4 advanced simple profile decoder.
IET Comput. Digit. Tech., 2007

2006
A unified system-level modeling and simulation environment for MPSoC design: MPEG-4 decoder case study.
Proceedings of the Conference on Design, Automation and Test in Europe, 2006

2005
A multicast inter-task communication protocol for embedded multiprocessor systems.
Proceedings of the 3rd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2005

2004
CASSE: A System-Level Modeling and Design-Space Exploration Tool for Multiprocessor Systems-on-Chip.
Proceedings of the 2004 Euromicro Symposium on Digital Systems Design (DSD 2004), Architectures, Methods and Tools, 31 August, 2004

2003
A Scalable Communication Platform for High Performance Multimedia Applications.
Proceedings of the First Workshop on Embedded Systems for Real-Time Multimedia, 2003

2001
Quantitative study of the impact of design and synthesis options on processor core performance.
IEEE Trans. Very Large Scale Integr. Syst., 2001

2000
Synthesis Experiments and Performance Metrics for Evaluating the Quality of IP Blocks and Megacells.
Proceedings of the 1st International Symposium on Quality of Electronic Design (ISQED 2000), 2000

1999
Design of Efficient SPARC Cores for Embedded Systems.
Proceedings of the 25th EUROMICRO '99 Conference, 1999

Flexible design of SPARC cores: a quantitative study.
Proceedings of the Seventh International Workshop on Hardware/Software Codesign, 1999


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