Tomohiro Matsumoto
According to our database1,
Tomohiro Matsumoto authored at least 5 papers
between 2008 and 2026.
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Bibliography
2026
11.6 an 8B 20Gs/S Time-Interleaved ADC with 2.6mW 1GS/s Hybrid Voltage/Time-Domain Sub-ADC in 12Nm FinFET.
Proceedings of the IEEE International Solid-State Circuits Conference, 2026
2022
An Injection-Locked Ring-Oscillator-Based Fractional-N Digital PLL Supporting BLE Frequency Modulation.
IEEE J. Solid State Circuits, 2022
A 100kHz-Bandwidth 98.3dB-SNDR Noise-Shaping SAR ADC with Improved Mismatch Error Shaping and Speed-Up Techniques.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
2020
A 0.5-V BLE Transceiver With a 1.9-mW RX Achieving -96.4-dBm Sensitivity and -27-dBm Tolerance for Intermodulation From Interferers at 6- and 12-MHz Offsets.
IEEE J. Solid State Circuits, 2020
2008
Int. J. Autom. Technol., 2008