Tomoji Nakamura
According to our database1,
Tomoji Nakamura
authored at least 7 papers
between 2011 and 2023.
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Bibliography
2023
Bumpless Build Cube (BBCube) 3D: Heterogeneous 3D Integration Using WoW and CoW to Provide TB/s Bandwidth with Lowest Bit Access Energy.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
2015
Scenario for catastrophic failure in interconnect structures under chip package interaction.
Proceedings of the IEEE International Reliability Physics Symposium, 2015
Proceedings of the 2015 International 3D Systems Integration Conference, 2015
2014
Proceedings of the 2014 International 3D Systems Integration Conference, 2014
2013
Experimental and numerical evaluation of interfacial adhesion on Cu/SiN in LSI interconnect structures.
Microelectron. Reliab., 2013
2011
Characterization of local strain around trough silicon via interconnects in wafer-on-wafer structures.
Proceedings of the 2011 IEEE International 3D Systems Integration Conference (3DIC), Osaka, Japan, January 31, 2011
Comparative study of side-wall roughness effects on leakage currents in through-silicon via interconnects.
Proceedings of the 2011 IEEE International 3D Systems Integration Conference (3DIC), Osaka, Japan, January 31, 2011