Torsten Lehmann

According to our database1, Torsten Lehmann authored at least 71 papers between 1993 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2023
Active Noise Cancelling Method for An Electro-Optical Detection System.
Proceedings of the IEEE Nordic Circuits and Systems Conference, 2023

2022
Impedance Properties of Multi-Optrode Biopotential Sensing Arrays.
IEEE Trans. Biomed. Eng., 2022

2020
On-Chip Digitally Controlled Operational Amplifier Characterisation Circuit without Additional Pins.
Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020

2019
High Gain Operational Amplifiers in 22 nm CMOS.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

Cryogenic Support Circuits and Systems for Silicon Quantum Computers.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

2018
A reconfigurable dual-output buck-boost switched-capacitor converter using adaptive gain and discrete frequency scaling control.
Microelectron. J., 2018

2017
A Statistical Design Approach Using Fixed and Variable Width Transconductors for Positive-Feedback Gain-Enhancement OTAs.
IEEE Trans. Very Large Scale Integr. Syst., 2017

A Self-Calibrated Cryogenic Current Cell for 4.2 K Current Steering D/A Converters.
IEEE Trans. Circuits Syst. II Express Briefs, 2017

Partial Dynamic Element Matching Technique for Digital-to-Analog Converters Used for Digital Harmonic-Cancelling Sine-Wave Synthesis.
IEEE Trans. Circuits Syst. I Regul. Pap., 2017

The effect of source resistance on the linearity of Nauta structure OTA.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

2016
A Statistical Design Approach for a Digitally Programmable Mismatch-Tolerant High-Speed Nauta Structure Differential OTA in 65-nm CMOS.
IEEE Trans. Very Large Scale Integr. Syst., 2016

A 0.04 mm<sup>2</sup> Buck-Boost DC-DC Converter for Biomedical Implants Using Adaptive Gain and Discrete Frequency Scaling Control.
IEEE Trans. Biomed. Circuits Syst., 2016

Hybrid dual-mode low voltage dropout regulator with infinite impulse response digital filters.
Proceedings of the IEEE 7th Latin American Symposium on Circuits & Systems, 2016

The effect of amplitude resolution and mismatch on a digital-to-analog converter used for digital harmonic-cancelling sine-wave synthesis.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

2015
Concept Design for a 1-Lead Wearable/Implantable ECG Front-End: Power Management.
Sensors, 2015

Subthreshold operation of Nauta's operational transconductance amplifier.
Proceedings of the IEEE 13th International New Circuits and Systems Conference, 2015

Design of a digital harmonic-cancelling sine-wave synthesizer with 100 MHz output frequency, 43.5 dB SFDR, and 2.26 mW power.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

A novel method for non-invasive respiration monitoring.
Proceedings of the 37th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2015

2014
Sub-Nanoampere One-Shot Single Electron Transistor Readout Electrometry Below 10 Kelvin.
IEEE Trans. Circuits Syst. I Regul. Pap., 2014

Safety Ensuring Retinal Prosthesis With Precise Charge Balance and Low Power Consumption.
IEEE Trans. Biomed. Circuits Syst., 2014

A reconfigurable buck-boost switched capacitor converter architecture for multiple, distributed on-chip load applications.
Proceedings of the IEEE 12th International New Circuits and Systems Conference, 2014

A 10 bit cryogenic CMOS D/A converter.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

A digital to transconductance converter for nauta structure op-amps in 65nm CMOS.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

Nauta OTA in a second-order continuous-time delta-sigma modulator.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

A simple digital architecture for a harmonic-cancelling sine-wave synthesizer.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

Neuromodulation of the retina from the suprachoroidal space: The Phoenix 99 implant.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2014

Calibration of the Nauta structure differential OTA.
Proceedings of the 2014 IEEE Asia Pacific Conference on Circuits and Systems, 2014

High-voltage tolerant switch configuration using standard 3.3-V 0.5-μm silicon-on-sapphire CMOS transistors.
Proceedings of the 2014 IEEE Asia Pacific Conference on Circuits and Systems, 2014

2013
Dual-Stacked Current Recycling Linear Regulators With 48% Power Saving for Biomedical Implants.
IEEE Trans. Circuits Syst. I Regul. Pap., 2013

Design of Safe Two-Wire Interface-Driven Chip-Scale Neurostimulator for Visual Prosthesis.
IEEE J. Solid State Circuits, 2013

The Ripple Pond: Enabling Spiking Networks to See.
CoRR, 2013

A 2.6V Silicon-on Sapphire CMOS current imbalance sensing circuit for neurostimulation applications.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

A 7.8V neurostimulator based on cascoded low-voltage Silicon-on-Sapphire MOS transistors.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

Design and simulation of an inductive link using fully integrated receiver coil in biomedical implants.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

Design strategy for enhanced output impedance current-steering DAC in sigma-delta converters.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

Accurate sensor readout circuitry for reliability measurement of hermetically sealed chip-scale biomedical implants.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

Mismatch insensitive automatic tuning control for the single electron transistor readout circuit.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

High current driving charge pumps in distributed biomedical implants using silicon-on-sapphire technology.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

A 0.3mm<sup>2</sup> 10-b 100MS/s pipelined ADC using Nauta structure op-amps in 180nm CMOS.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

2012
Power Saving Circuit Design Techniques for Implantable Neuro-Stimulators.
J. Circuits Syst. Comput., 2012

Towards the implementation of a cryogenic D/A converter for silicon quantum computer controller.
Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012

A 1.2V 2-bit phase interpolator for 65nm CMOS.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

A cryogenic single electron transistor readout circuit: Practical issues and measurement considerations.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

A reconfigurable buck-boost switched capacitor converter with adaptive gain and discrete frequency scaling control.
Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012

Required matching accuracy of biphasic current pulse in multi-channel current mode bipolar stimulation for safety.
Proceedings of the Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2012

A method for measuring switching frequency using complex asynchronous logic circuits.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2012

Low-power circuit structures for chip-scale stimulating implants.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2012

A synchronous buck-boost converter on a Silicon-On-Sapphire 0.5µm process.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2012

2011
Nanosecond Delay Floating High Voltage Level Shifters in a 0.35 μ m HV-CMOS Technology.
IEEE J. Solid State Circuits, 2011

A semi-static threshold-triggered delay element for low power applications.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

Towards a chip scale neurostimulator: System architecture of a current-driven 98 channel neurostimulator via a two-wire interface.
Proceedings of the 33rd Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2011

Laser-micromachined, chip-scaled ceramic carriers for implantable neurostimulators.
Proceedings of the 33rd Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2011

2010
Current-limited passive charge recovery for implantable neuro-stimulators: Power savings, modelling and characterisation.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

SOS current mirror matching at 4K: A brief study.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

A cryogenic D/A converter with novel charge injection reduction technique for silicon quantum computer controller circuit.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010

2008
A novel safety system concept and implementation for implantable stimulators: A universal DC tissue leakage current detector.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

Implant electronics for intraocular epiretinal neuro-stimulators.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

2007
Analog circuits for thermistor linearization with Chebyshev-optimal linearity error.
Proceedings of the 18th European Conference on Circuit Theory and Design, 2007

2006
Microelectronic Retinal Prosthesis: I. A Neurostimulator for the Concurrent Activation of Multiple Electrodes.
Proceedings of the 28th International Conference of the IEEE Engineering in Medicine and Biology Society, 2006

Microelectronic Retinal Prosthesis: II. Use of High-Voltage CMOS in Retinal Neurostimulators.
Proceedings of the 28th International Conference of the IEEE Engineering in Medicine and Biology Society, 2006

The Design and Testing of an Epi-Retinal Vision Prosthesis Neurostimulator Capable of Concurrent Parallel Stimulation.
Proceedings of the 28th International Conference of the IEEE Engineering in Medicine and Biology Society, 2006

2005
On-chip active power rectifiers for biomedical applications.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

A 5V charge pump in a standard 1.8-V 0.18-µm CMOS process.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2002
1 V OTA Using Current Driven Bulk Circuits.
J. Circuits Syst. Comput., 2002

2001
1-V power supply CMOS cascode amplifier.
IEEE J. Solid State Circuits, 2001

An implantable CMOS amplifier for nerve signals.
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001

2000
An implantable CMOS signal conditioning system for recording nerve signals with cuff electrodes.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

Integrating data converters for picoampere currents from electrochemical transducers.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

1997
Nonlinear backpropagation: doing backpropagation without derivatives of the activation function.
IEEE Trans. Neural Networks, 1997

1993
An analog CMOS chip set for neural networks with arbitrary topologies.
IEEE Trans. Neural Networks, 1993

A Hardware Efficient Cascadable Chip Set For Ann'S With On-Chip Backpropagation.
Int. J. Neural Syst., 1993


  Loading...