Cesar Ramos Rodrigues

Orcid: 0000-0002-5742-2605

According to our database1, Cesar Ramos Rodrigues authored at least 29 papers between 2003 and 2021.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2021
A compact QRS detection system based on 0.79 μW analog CMOS energy-of-derivative circuit.
Microelectron. J., 2021

A Two-Stage Single-Ended OTA with Improved Composite Transistors.
Proceedings of the IEEE Nordic Circuits and Systems Conference, NorCAS 2021, Oslo, 2021

CMOS inverter linearization technique with active source degeneration.
Proceedings of the IEEE Nordic Circuits and Systems Conference, NorCAS 2021, Oslo, 2021

A 1V, 450pS OTA Based on Current-Splitting and Modified Series-Parallel Mirrors.
Proceedings of the 12th IEEE Latin America Symposium on Circuits and System, 2021

An inverter-based OTA using improved composite transistors and bulk-driven common-mode rejection.
Proceedings of the IEEE Asia Pacific Conference on Circuit and Systems, 2021

Fully-differential inverter-based OTA with improved composite transistors.
Proceedings of the IEEE Asia Pacific Conference on Circuit and Systems, 2021

2018
Sleep Stages Classification Using Spectral Based Statistical Moments as Features.
RITA, 2018

Hierarchical Ant Colony for Simultaneous Classifier Selection and Hyperparameter Optimization.
Proceedings of the 2018 IEEE Congress on Evolutionary Computation, 2018

2017
Single-channel EEG sleep stage classification based on a streamlined set of statistical features in wavelet domain.
Medical Biol. Eng. Comput., 2017

2016
Automated drowsiness detection through wavelet packet analysis of a single EEG channel.
Expert Syst. Appl., 2016

2015
An 8-bit 0.35-V 5.04-fJ/Conversion-Step SAR ADC With Background Self-Calibration of Comparator Offset.
IEEE Trans. Very Large Scale Integr. Syst., 2015

Direct Feedback Topology for Reducing Residual Voltage in Functional Electrical Stimulation.
Proceedings of the 28th Symposium on Integrated Circuits and Systems Design, 2015

A charge-redistribution based controller for keeping charge balance in neural stimulation.
Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015

2013
PTAT CMOS current sources mismatch over temperature.
Proceedings of the 26th Symposium on Integrated Circuits and Systems Design, 2013

A 2.6V Silicon-on Sapphire CMOS current imbalance sensing circuit for neurostimulation applications.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

A 7.8V neurostimulator based on cascoded low-voltage Silicon-on-Sapphire MOS transistors.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

Accurate sensor readout circuitry for reliability measurement of hermetically sealed chip-scale biomedical implants.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

A 5-bit 1.5GSps calibration-less binary search ADC using threshold reconfigurable comparators.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

A self-calibrated 10-bit 1 MSps SAR ADC with reduced-voltage charge-sharing DAC.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

2012
A 5 MSps 13.25µW 8-bit SAR ADC with single-ended or differential input.
Microelectron. J., 2012

PyCO: A parallel genetic algorithm optimization tool for analog circuits.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

An IR-UWB transmitter with digital pulse duration control.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

A 4-bit 1.5GSps 4.2mW comparator-based binary search ADC in 90nm.
Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012

A 749nW 1MSps 8-bit SAR ADC at 0.5V employing boosted switches.
Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012

2011
An energy-efficient 1MSps 7µW 11.9fJ/conversion step 7pJ/sample 10-bit SAR ADC in 90nm.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

2007
Current mode instrumentation amplifier with rail-to-rail input and output.
Proceedings of the 20th Annual Symposium on Integrated Circuits and Systems Design, 2007

Design of an integrated low power high CMRR instrumentation amplifier for biomedical applications.
Proceedings of the 20th Annual Symposium on Integrated Circuits and Systems Design, 2007

2003
FPGA Implementation of a VVI Temporary Pacemaker Digital Control.
Proceedings of the IFIP VLSI-SoC 2003, 2003

Low-Power High-CMRR CMOS Instrumentation Amplifier for Biomedical Applications.
Proceedings of the IFIP VLSI-SoC 2003, 2003


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