Runchun Wang

According to our database1, Runchun Wang authored at least 32 papers between 2011 and 2021.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2021
Live Demonstration: An FPGA-Based Emulation of an Event-Based Vision Sensor Using Commercially Available Camera.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

2020

2019
CAR-Lite: A Multi-Rate Cochlear Model on FPGA for Spike-Based Sound Encoding.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

A Binaural Sound Localization System using Deep Convolutional Neural Networks.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

Single-Bit-per-Weight Deep Convolutional Neural Networks without Batch-Normalization Layers for Embedded Systems.
Proceedings of the 4th Asia-Pacific Conference on Intelligent Robot Systems, 2019

2018
An Analogue Neuromorphic Co-Processor That Utilizes Device Mismatch for Learning Applications.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018

Large-Scale Neuromorphic Spiking Array Processors: A quest to mimic the brain.
CoRR, 2018

An FPGA-based Massively Parallel Neuromorphic Cortex Simulator.
CoRR, 2018

A Machine Hearing System for Binaural Sound Localization based on Instantaneous Correlation.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

CAR-Lite: A Multi-Rate Cochlea Model on FPGA.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

2017
Neuromorphic Hardware Architecture Using the Neural Engineering Framework for Pattern Recognition.
IEEE Trans. Biomed. Circuits Syst., 2017

2016
A Low Power Trainable Neuromorphic Integrated Circuit That Is Tolerant to Device Mismatch.
IEEE Trans. Circuits Syst. I Regul. Pap., 2016

A stochastic approach to STDP.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

Electronic cochlea: CAR-FAC model on FPGA.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2016

An SRAM-based implementation of a convolutional neural network.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2016

2015
A neuromorphic hardware architecture using the Neural Engineering Framework for pattern recognition.
CoRR, 2015

A Trainable Neuromorphic Integrated Circuit that Exploits Device Mismatch.
CoRR, 2015

An Online Learning Algorithm for Neuromorphic Hardware Implementation.
CoRR, 2015

A neuromorphic hardware framework based on population coding.
Proceedings of the 2015 International Joint Conference on Neural Networks, 2015

A reconfigurable mixed-signal implementation of a neuromorphic ADC.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2015

A compact aVLSI conductance-based silicon neuron.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2015

2014
Delay learning architectures for memory and classification.
Neurocomputing, 2014

A generalised conductance-based silicon neuron for large-scale spiking neural networks.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

A compact reconfigurable mixed-signal implementation of synaptic plasticity in spiking neurons.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

An FPGA design framework for large-scale spiking neural networks.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

A compact neural core for digital implementation of the Neural Engineering Framework.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2014

2013
Synthesis of neural networks for spatio-temporal spike pattern recognition and processing
CoRR, 2013

The Ripple Pond: Enabling Spiking Networks to See.
CoRR, 2013

An improved aVLSI axon with programmable delay using spike timing dependent delay plasticity.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

2012
An aVLSI programmable axonal delay circuit with spike timing dependent delay adaptation.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

DELTRON: Neuromorphic architectures for delay based learning.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2012

2011
A programmable axonal propagation delay circuit for time-delay spiking neural networks.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011


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