Toru Endo

According to our database, Toru Endo authored at least 5 papers between 2002 and 2007.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2007

A Reliable 1T1C FeRAM Using a Thermal History Tracking 2T2C Dual Reference Level Technique for a Smart Card Application Chip.

Shoichiro Kawashima, Isao Fukushi, Keizo Morita, Ken-ichi Nakabayashi, Mitsuharu Nakazawa, Kazuaki Yamane, Tomohisa Hirayama, Toru Endo

IEICE Trans. Electron., 2007

2004

Circuit implementations of the differential capacitance read scheme (DCRS) for ferroelectric random-access memories (FeRAM).

Yadollah Eslami, Ali Sheikholeslami, Shoichi Masui, Toru Endo, Shoichiro Kawashima

IEEE J. Solid State Circuits, 2004

2003

A current-based reference-generation scheme for 1T-1C ferroelectric random-access memories.

Joseph Wai Kit Siu, Yadollah Eslami, Ali Sheikholeslami, P. Glenn Gulak, Toru Endo, Shoichiro Kawashima

IEEE J. Solid State Circuits, 2003

2002

Bitline GND sensing technique for low-voltage operation FeRAM.

Shoichiro Kawashima, Toru Endo, Akira Yamamoto, Ken-ichi Nakabayashi, Mitsuharu Nakazawa, Keizo Morita, Masaki Aoki

IEEE J. Solid State Circuits, 2002

A 16 kb 1T1C FeRAM test chip using current-based reference scheme.

Joseph Wai Kit Siu, Yadollah Eslami, Ali Sheikholeslami, P. Glenn Gulak, Toru Endo, Shoichiro Kawashima

Proceedings of the IEEE 2002 Custom Integrated Circuits Conference, 2002