Tsutomu Fujita

According to our database1, Tsutomu Fujita authored at least 6 papers between 1994 and 2013.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2013
Toward Introduction of Immunity-based Model to Continuous Behavior-based User Authentication on Smart Phone.
Proceedings of the 17th International Conference in Knowledge Based and Intelligent Information and Engineering Systems, 2013

2000
An 8-ns random cycle embedded RAM macro with dual-port interleaved DRAM architecture (D<sup>2</sup>/RAM).
IEEE J. Solid State Circuits, 2000

1997
A unity power factor PWM rectifier with DC ripple compensation.
IEEE Trans. Ind. Electron., 1997

1995
A circuit technology for a self-refresh 16 Mb DRAM with less than 0.5 μA/MB data-retention current.
IEEE J. Solid State Circuits, November, 1995

An asymptotically zero power charge-recycling bus architecture for battery-operated ultrahigh data rate ULSI's.
IEEE J. Solid State Circuits, April, 1995

1994
A 256-Mb DRAM with 100 MHz serial I/O ports for storage of moving pictures.
IEEE J. Solid State Circuits, November, 1994


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