Umamaheswara Rao Tida

Orcid: 0000-0002-9724-1585

According to our database1, Umamaheswara Rao Tida authored at least 19 papers between 2014 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
Modeling and Design of Dual-Purpose MIV in Monolithic 3D IC.
IEEE Access, 2024

2023
Design, Analysis and Optimization of Magnetic-Core Solenoid Inductor for On-Chip Multi-Phase Buck Converter.
IEEE Access, 2023

FDSOI Process Based MIV-transistor Utilization for Standard Cell Designs in Monolithic 3D Integration.
Proceedings of the 36th IEEE International System-on-Chip Conference, 2023

Efficient and Scalable MIV-Transistor with Extended Gate in Monolithic 3D Integration.
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023

Metal Inter-layer Via Keep-out-zone in M3D IC: A Critical Process-aware Design Consideration.
Proceedings of the 24th International Symposium on Quality Electronic Design, 2023

Small Footprint 6T-SRAM Design with MIV-Transistor Utilization in M3D-IC Technology.
Proceedings of the 41st IEEE International Conference on Computer Design, 2023

2022
Magnetic Core TSV-Inductor Design and Optimization for On-chip DC-DC Converter.
ACM Trans. Design Autom. Electr. Syst., 2022

2020
Dynamic Frequency Scaling Aware Opportunistic Through-Silicon-Via Inductor Utilization in Resonant Clocking.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

An Improved Quadrature Voltage-Controlled Oscillator with Through-Silicon-Via Inductor in Three-dimensional Integrated Circuits.
CoRR, 2020

Efficient Metal Inter-Layer Via Utilization Strategies for Three-dimensional Integrated Circuits.
Proceedings of the 33rd IEEE International System-on-Chip Conference, 2020

Design and Optimization of Magnetic-core Solenoid Inductor for Multi-phase Buck Converter.
Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020

Dual-Purpose Metal Inter-layer Via Utilization in Monolithic Three-Dimensional (M3D) Integration.
Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020

2019
Single-Inductor-Multiple-Tier Regulation: TSV-Inductor-Based On-Chip Buck Converters for 3-D IC Power Delivery.
IEEE Trans. Very Large Scale Integr. Syst., 2019

2018
Modeling and optimization of magnetic core TSV-inductor for on-chip DC-DC converter.
Proceedings of the International Conference on Computer-Aided Design, 2018

2015
On the Efficacy of Through-Silicon-Via Inductors.
IEEE Trans. Very Large Scale Integr. Syst., 2015

2014
Novel Through-Silicon-Via Inductor-Based On-Chip DC-DC Converter Designs in 3D ICs.
ACM J. Emerg. Technol. Comput. Syst., 2014

"Green" On-chip Inductors in Three-Dimensional Integrated Circuits.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2014

Opportunistic through-silicon-via inductor utilization in LC resonant clocks: concept and algorithms.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2014

Through-silicon-via inductor: Is it real or just a fantasy?
Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014


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