Umesh Chand

According to our database1, Umesh Chand authored at least 4 papers between 2019 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
A Low-Power DNN Accelerator Enabled by a Novel Staircase RRAM Array.
IEEE Trans. Neural Networks Learn. Syst., August, 2023

2022
Sub-10nm Ultra-thin ZnO Channel FET with Record-High 561 µA/µm ION at VDS 1V, High µ-84 cm<sup>2</sup>/V-s and1T-1RRAM Memory Cell Demonstration Memory Implications for Energy-Efficient Deep-Learning Computing.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

2020
Fledge: Flexible Edge Platforms Enabled by In-memory Computing.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

2019
Design of Artificial Spiking Neuron with SiO2 Memristive Synapse to Demonstrate Neuron-Level Spike Timing Dependent Plasticity.
Proceedings of the International Conference on IC Design and Technology, 2019


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