Hasita Veluri

According to our database, Hasita Veluri authored at least 5 papers between 2019 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2023

A Low-Power DNN Accelerator Enabled by a Novel Staircase RRAM Array.

Hasita Veluri, Umesh Chand, Yida Li, Baoshan Tang, Aaron Voon-Yew Thean

IEEE Trans. Neural Networks Learn. Syst., August, 2023

2022

Sub-10nm Ultra-thin ZnO Channel FET with Record-High 561 µA/µm ION at VDS 1V, High µ-84 cm²/V-s and1T-1RRAM Memory Cell Demonstration Memory Implications for Energy-Efficient Deep-Learning Computing.

Umesh Chand, Mohamed M. Sabry Aly, Manohar Lal, Chen Chun-Kuei, Sonu Hooda, Shih-Hao Tsai, Zihang Fang, Hasita Veluri, Aaron Voon-Yew Thean

Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

2021

High-Throughput, Area-Efficient, and Variation-Tolerant 3-D In-Memory Compute System for Deep Convolutional Neural Networks.

Hasita Veluri, Yida Li, Jessie Xuhua Niu, Evgeny Zamburg, Aaron Voon-Yew Thean

IEEE Internet Things J., 2021

2020

Quantifying the Benefits of Monolithic 3D Computing Systems Enabled by TFT and RRAM.

Abdallah M. Felfel, Kamalika Datta, Arko Dutt, Hasita Veluri, Ahmed Zaky, Aaron Voon-Yew Thean, Mohamed M. Sabry Aly

Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

2019

Design of Artificial Spiking Neuron with SiO2 Memristive Synapse to Demonstrate Neuron-Level Spike Timing Dependent Plasticity.

Jessie Xuhua Niu, Hasita Veluri, Yida Li, Umesh Chand, Jin Feng Leong, Evgeny Zamburg, Maheswari Sivan, Aaron Voon-Yew Thean

Proceedings of the International Conference on IC Design and Technology, 2019