Uriel Jaramillo-Toral

According to our database, Uriel Jaramillo-Toral authored at least 5 papers between 2024 and 2025.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2025

Implementation of a 16:1 Multiplexer and 1:16 Demultiplexer on a Single Chip Using Sky130 PDK and Open-Source EDA Tools for Silicluster.

Uriel Jaramillo-Toral, Susana Ortega-Cisneros, Emilio Isaac Baungarten-Leon, Erick Jaramillo-Toral, Héctor Emmanuel Muñoz Zapata

Proceedings of the 33rd IFIP/IEEE International Conference on Very Large Scale Integration, 2025

Analog Blocks for 8-Bit SAR ADC: Rail-to-Rail Comparator and Two-Stage Operational Amplifier Designed with Open-Source Tools and Sky130 PDK.

Uriel Jaramillo-Toral, Susana Ortega-Cisneros, Emilio Isaac Baungarten-Leon, Erick Jaramillo-Toral, Héctor Emmanuel Muñoz Zapata

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2025

2024

Vector Accelerator Unit for Caravel.

Emilio Isaac Baungarten-Leon, Susana Ortega-Cisneros, Uriel Jaramillo-Toral, Francisco J. Rodriguez-Navarrete, Luis Pizano-Escalante, Juan José Raygoza-Panduro

IEEE Embed. Syst. Lett., March, 2024

Macro Memory Cell Generator for SKY130 PDK.

Emilio Isaac Baungarten-Leon, Susana Ortega-Cisneros, German Alonso Pinedo Diaz, Miguel Rivera-Acosta, Francisco J. Rodriguez-Navarrete, Uriel Jaramillo-Toral, Cristian Torres González, Juan Carlos Garcia Lopez

IEEE Access, 2024

Automated IC Design Flow Using Open-Source Tools and 180 nm PDK.

Uriel Jaramillo-Toral, Juan Carlos Garcia Lopez, Susana Ortega-Cisneros, Emilio Isaac Baungarten-Leon, Cristian Torres González, Federico Sandoval-Ibarra

Proceedings of the 67th IEEE International Midwest Symposium on Circuits and Systems, 2024