Juan José Raygoza-Panduro

According to our database1, Juan José Raygoza-Panduro authored at least 16 papers between 2005 and 2015.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

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Bibliography

2015
HW/SW Co-Design of a Specific Accelerator for Robotic Computer Vision.
Computación y Sistemas, 2015

FPGA-based startup for AC electric drives: Application to a greenhouse ventilation system.
Computers in Industry, 2015

An image processor for convolution and correlation of binary images implemented in FPGA.
Proceedings of the 12th International Conference on Electrical Engineering, 2015

Design and implementation of a DC motor control using Field Programmable Analog Arrays.
Proceedings of the 12th International Conference on Electrical Engineering, 2015

A Hardware Implementation of a Unit for Geometric Algebra Operations With Parallel Memory Arrays (Abstract Only).
Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2015

2014
Discrete-time modeling and control of a boost converter by means of a variational integrator and sliding modes.
J. Franklin Institute, 2014

Characterization technique to implement self-timed cells for VLSI design blocks.
Proceedings of the 11th International Conference on Electrical Engineering, 2014

Space-time AER protocol receiver asynchronously controlled on FPGA.
Proceedings of the 11th International Conference on Electrical Engineering, 2014

FPGA Implementation of a NARX Network for Modeling Nonlinear Systems.
Proceedings of the Progress in Pattern Recognition, Image Analysis, Computer Vision, and Applications, 2014

Real Time Hardware Accelerator for Image Filtering.
Proceedings of the Progress in Pattern Recognition, Image Analysis, Computer Vision, and Applications, 2014

2012
Copper and Core Loss Minimization for Induction Motors Using High-Order Sliding-Mode Control.
IEEE Trans. Industrial Electronics, 2012

Super-twisting sensorless control of linear induction motors.
Proceedings of the 9th International Conference on Electrical Engineering, 2012

2008
Design of a Mathematical Unit in FPGA for the Implementation of the Control of a Magnetic Levitation System.
Int. J. Reconfig. Comp., 2008

2007
Design and Implementation of the AMCC Self-Timed Microprocessor in FPGAs.
J. UCS, 2007

2005
FPGA implementation of a synchronous and self-timed neuroprocessor.
Proceedings of the 2005 International Conference on Reconfigurable Computing and FPGAs, 2005

Rapid prototyping of a self-timed ALU with FPGAs.
Proceedings of the 2005 International Conference on Reconfigurable Computing and FPGAs, 2005


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