V. A. Niranjan

According to our database, V. A. Niranjan authored at least 3 papers between 2021 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2023

Machine Learning-Based Adaptive Outlier Detection for Underkill Reduction in Analog/RF IC Testing.

V. A. Niranjan, Deepika Neethirajan, Constantinos Xanthopoulos, D. Webster, Amit Nahar, Yiorgos Makris

Proceedings of the 41st IEEE VLSI Test Symposium, 2023

2022

Machine Learning-Based Overkill Reduction through Inter-Test Correlation.

Deepika Neethirajan, V. A. Niranjan, Richard Willis, Amit Nahar, D. Webster, Yiorgos Makris

Proceedings of the 40th IEEE VLSI Test Symposium, 2022

2021

Trim Time Reduction in Analog/RF ICs Based on Inter-Trim Correlation.

V. A. Niranjan, Deepika Neethirajan, Constantinos Xanthopoulos, E. De La Rosa, C. Alleyne, S. Mier, Yiorgos Makris

Proceedings of the 39th IEEE VLSI Test Symposium, 2021