According to our database1, Viktor Schuppan authored at least 21 papers between 2000 and 2018.
Legend:Book In proceedings Article PhD thesis Other
Enhanced Unsatisfiable Cores for QBF: Weakening Universal to Existential Quantifiers.
Proceedings of the IEEE 30th International Conference on Tools with Artificial Intelligence, 2018
Enhancing Unsatisfiable Cores for LTL with Information on Temporal Relevance.
Proceedings of the Proceedings 11th International Workshop on Quantitative Aspects of Programming Languages and Systems, 2013
Extracting Unsatisfiable Cores for LTL via Temporal Resolution.
Proceedings of the 2013 20th International Symposium on Temporal Representation and Reasoning, 2013
Towards a notion of unsatisfiable and unrealizable cores for LTL.
Sci. Comput. Program., 2012
Evaluating LTL Satisfiability Solvers.
Proceedings of the Automated Technology for Verification and Analysis, 2011
RATSY - A New Requirements Analysis Tool with Synthesis.
Proceedings of the Computer Aided Verification, 22nd International Conference, 2010
Towards a Notion of Unsatisfiable Cores for LTL.
Proceedings of the Fundamentals of Software Engineering, 2009
Diagnostic Information for Realizability.
Proceedings of the Verification, 2008
Survey on Directed Model Checking.
Proceedings of the Model Checking and Artificial Intelligence, 5th International Workshop, 2008
Boolean Abstraction for Temporal Logic Satisfiability.
Proceedings of the Computer Aided Verification, 19th International Conference, 2007
Liveness checking as safety checking to find shortest counterexamples to linear time properties.
PhD thesis, 2006
Linear Encodings of Bounded LTL Model Checking.
Logical Methods in Computer Science, 2006
Liveness Checking as Safety Checking for Infinite State Spaces.
Electr. Notes Theor. Comput. Sci., 2006
JVM Independent Replay in Java.
Electr. Notes Theor. Comput. Sci., 2005
Shortest Counterexamples for Symbolic Model Checking of LTL with Past.
Proceedings of the Tools and Algorithms for the Construction and Analysis of Systems, 2005
Efficient reduction of finite state model checking to reachability analysis.
JNuke: Efficient Dynamic Analysis for Java.
Proceedings of the Computer Aided Verification, 16th International Conference, 2004
Verifying the IEEE 1394 FireWire Tree Identify Protocol with SMV.
Formal Asp. Comput., 2003
Formal Methods Group ETH Zürich.
Electr. Notes Theor. Comput. Sci., 2003
Liveness Checking as Safety Checking.
Electr. Notes Theor. Comput. Sci., 2002
A CMM-Based Evaluation of the V-Model 97.
Proceedings of the Software Process Technology, 7th European Workshop, 2000