Vinay Gangadhar

According to our database1, Vinay Gangadhar authored at least 13 papers between 2015 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2022
The Mozart reuse exposed dataflow processor for AI and beyond: industrial product.
Proceedings of the ISCA '22: The 49th Annual International Symposium on Computer Architecture, New York, New York, USA, June 18, 2022

2021
Mozart: Designing for Software Maturity and the Next Paradigm for Chip Architectures.
Proceedings of the IEEE Hot Chips 33 Symposium, 2021

2019
Heterogeneous Von Neumann/dataflow microprocessors.
Commun. ACM, 2019

2017
Domain Specialization Is Generally Unnecessary for Accelerators.
IEEE Micro, 2017

Kickstarting Semiconductor Innovation with Open Source Hardware.
Computer, 2017

Stream-Dataflow Acceleration.
Proceedings of the 44th Annual International Symposium on Computer Architecture, 2017

2016
A Heterogeneous Von Neumann/Explicit Dataflow Processor.
IEEE Micro, 2016

Open-source Hardware: Opportunities and Challenges.
CoRR, 2016

Pushing the limits of accelerator efficiency while retaining programmability.
Proceedings of the 2016 IEEE International Symposium on High Performance Computer Architecture, 2016

2015
Enabling GPGPU Low-Level Hardware Explorations with MIAOW: An Open-Source RTL Implementation of a GPGPU.
ACM Trans. Archit. Code Optim., 2015

Exploring the potential of heterogeneous von neumann/dataflow execution models.
Proceedings of the 42nd Annual International Symposium on Computer Architecture, 2015

MIAOW: An open source GPGPU.
Proceedings of the 2015 IEEE Hot Chips 27 Symposium (HCS), 2015

MIAOW - An open source RTL implementation of a GPGPU.
Proceedings of the 2015 IEEE Symposium in Low-Power and High-Speed Chips, 2015


  Loading...