Chen-Han Ho

According to our database1, Chen-Han Ho authored at least 13 papers between 2011 and 2016.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2016
Accelerating the Accelerator Memory Interface with Access-Execute and Dataflow.
IEEE Micro, 2016

2015
Enabling GPGPU Low-Level Hardware Explorations with MIAOW: An Open-Source RTL Implementation of a GPGPU.
ACM Trans. Archit. Code Optim., 2015

Architectural Simulators Considered Harmful.
IEEE Micro, 2015

Performance evaluation of a DySER FPGA prototype system spanning the compiler, microarchitecture, and hardware implementation.
Proceedings of the 2015 IEEE International Symposium on Performance Analysis of Systems and Software, 2015

Efficient execution of memory access phases using dataflow specialization.
Proceedings of the 42nd Annual International Symposium on Computer Architecture, 2015

MIAOW - An open source RTL implementation of a GPGPU.
Proceedings of the 2015 IEEE Symposium in Low-Power and High-Speed Chips, 2015

2012
DySER: Unifying Functionality and Parallelism Specialization for Energy-Efficient Computing.
IEEE Micro, 2012

Mechanisms and Evaluation of Cross-Layer Fault-Tolerance for Supercomputing.
Proceedings of the 41st International Conference on Parallel Processing, 2012

Design, integration and implementation of the DySER hardware accelerator into OpenSPARC.
Proceedings of the 18th IEEE International Symposium on High Performance Computer Architecture, 2012

Prototyping the DySER specialization architecture with OpenSPARC.
Proceedings of the 2012 IEEE Hot Chips 24 Symposium (HCS), 2012

2011
Exploring the Interaction Between Device Lifetime Reliability and Security Vulnerabilities.
IEEE Comput. Archit. Lett., 2011

Sampling + DMR: practical and low-overhead permanent fault detection.
Proceedings of the 38th International Symposium on Computer Architecture (ISCA 2011), 2011

Dynamically Specialized Datapaths for energy efficient computing.
Proceedings of the 17th International Conference on High-Performance Computer Architecture (HPCA-17 2011), 2011


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