Vincenzo Maisto

Orcid: 0000-0002-1631-1597

According to our database1, Vincenzo Maisto authored at least 8 papers between 2022 and 2026.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2026
The Simply-V Framework: An Extensible RISC-V Reconfigurable Soft-SoC for Open Research and Fast Prototyping.
ACM Trans. Design Autom. Electr. Syst., May, 2026

Distilling knowledge for low-energy AIoT.
J. Syst. Archit., 2026

A hardware/software architecture for multi-threaded offloading of erasure codes in distributed file systems.
Future Gener. Comput. Syst., 2026

2025
Simply-V: A RISC-V Reconfigurable Playground Soft-SoC for Open Hardware Research and Fast Prototyping.
WiPiEC Journal, 2025

AraOS: Analyzing the Impact of Virtual Memory Management on Vector Unit Performance.
Proceedings of the 22nd ACM International Conference on Computing Frontiers: Workshops and Special Sessions, 2025

2024
An Approach to the Systematic Characterization of Multitask Accelerated CNN Inference in Edge MPSoCs.
ACM Trans. Embed. Comput. Syst., May, 2024

2022
A Proposal for FPGA-Accelerated Deep Learning Ensembles in MPSoC Platforms Applied to Malware Detection.
Proceedings of the Quality of Information and Communications Technology, 2022

A Pluggable Vector Unit for RISC-V Vector Extension.
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022


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