Vladimir Ostrovsky

According to our database1, Vladimir Ostrovsky authored at least 8 papers between 2002 and 2008.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2008
Arbitrary Error Detection in Combinational Circuits by Using Partitioning.
Proceedings of the 23rd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2008), 2008

2007
Reduction of Fault Latency in Sequential Circuits by using Decomposition.
Proceedings of the 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2007), 2007

2006
Cascade Scheme for Concurrent Errors Detection.
Proceedings of the Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August, 2006

2005
Implementation of Concurrent Checking Circuits by Independent Sub-circuits.
Proceedings of the 20th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2005), 2005

2004
Techniques for formal transformations of binary decision diagrams.
Proceedings of the 2004 11th IEEE International Conference on Electronics, 2004

2003
Increasing Implementability of beta-driven Threshold Checkers.
Proceedings of the 9th IEEE International On-Line Testing Symposium (IOLTS 2003), 2003

Designing FPGA based Self-Testing Checkers for m-out-of-n Codes.
Proceedings of the 9th IEEE International On-Line Testing Symposium (IOLTS 2003), 2003

2002
Self-checking sequential circuits with self-healing ability.
Proceedings of the 12th ACM Great Lakes Symposium on VLSI 2002, 2002


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