Mark G. Karpovsky
Affiliations: Boston University, MA, USA
According to our database^{1},
Mark G. Karpovsky
authored at least 108 papers
between 1977 and 2019.
Collaborative distances:
Collaborative distances:
Awards
IEEE Fellow
IEEE Fellow 1991, "For contributions to techniques and theory for design and testing of circuits and systems.".
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
Online presence:

on bu.edu

on mark.bu.edu
On csauthors.net:
Bibliography
2019
Design of reliable storage and compute systems with lightweight group testing based nonbinary error correction codes.
IET Comput. Digit. Tech., 2019
Comput. Secur., 2019
2017
A Design of Secure and ReliableWireless Transmission Channel for Implantable Medical Devices.
Proceedings of the 3rd International Conference on Information Systems Security and Privacy, 2017
2016
IEEE Trans. Computers, 2016
A hybrid selfdiagnosis mechanism with defective nodes locating and attack detection for parallel computing systems.
Proceedings of the 22nd IEEE International Symposium on OnLine Testing and Robust System Design, 2016
2015
Relations Between the Entropy of a Source and the Error Masking Probability for SecurityOriented Codes.
IEEE Trans. Commun., 2015
Proceedings of the 21st IEEE International OnLine Testing Symposium, 2015
2014
Optimal Turn Prohibition for Deadlock Prevention in Networks With Regular Topologies.
IEEE Trans. Control. Netw. Syst., 2014
Design of Strongly Secure Communication and Computation Channels by Nonlinear Error Detecting Codes.
IEEE Trans. Computers, 2014
IACR Cryptol. ePrint Arch., 2014
2013
Secure memories resistant to both random errors and fault injection attacks using nonlinear error correction codes.
Proceedings of the HASP 2013, 2013
2012
Design of Cryptographic Devices Resilient to Fault Injection Attacks Using Nonlinear Robust Codes.
Proceedings of the Fault Analysis in Cryptography, 2012
IEEE Trans. Very Large Scale Integr. Syst., 2012
Secure Multipliers Resilient to Strong FaultInjection Attacks Using Multilinear Arithmetic Codes.
IEEE Trans. Very Large Scale Integr. Syst., 2012
Proceedings of the 18th IEEE International OnLine Testing Symposium, 2012
2011
IET Commun., 2011
Algebraic manipulation detection codes and their applications for design of secure cryptographic devices.
Proceedings of the 17th IEEE International OnLine Testing Symposium (IOLTS 2011), 2011
Influence of metallic tubes on the reliability of CNTFET SRAMs: error mechanisms and countermeasures.
Proceedings of the 21st ACM Great Lakes Symposium on VLSI 2010, 2011
2010
IEEE Trans. Parallel Distributed Syst., 2010
Design of Memories with Concurrent Error Detection and Correction by Nonlinear SECDED Codes.
J. Electron. Test., 2010
Robust FSMs for cryptographic devices resilient to strong fault injection attacks.
Proceedings of the 16th IEEE International OnLine Testing Symposium (IOLTS 2010), 2010
Proceedings of the 2010 IEEE/IFIP International Conference on Dependable Systems and Networks, 2010
Proceedings of the 25th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2010
2009
Proceedings of the 23rd IEEE International Symposium on Parallel and Distributed Processing, 2009
Proceedings of the 15th IEEE International OnLine Testing Symposium (IOLTS 2009), 2009
Proceedings of the 15th IEEE International OnLine Testing Symposium (IOLTS 2009), 2009
Proceedings of the Information and Communications Security, 11th International Conference, 2009
Replacing linear Hamming codes by robust nonlinear codes results in a reliability improvement of memories.
Proceedings of the 2009 IEEE/IFIP International Conference on Dependable Systems and Networks, 2009
2008
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
Comparative Analysis of Robust Fault Attack Resistant Architectures for Public and Private Cryptosystems.
Proceedings of the Fifth International Workshop on Fault Diagnosis and Tolerance in Cryptography, 2008
2007
Robust codes and robust, faulttolerant architectures of the Advanced Encryption Standard.
J. Syst. Archit., 2007
2006
IEEE Trans. Inf. Theory, 2006
J. Graph Algorithms Appl., 2006
Proceedings of the 12th IEEE International OnLine Testing Symposium (IOLTS 2006), 2006
Proceedings of the Fault Diagnosis and Tolerance in Cryptography, 2006
Proceedings of the Fault Diagnosis and Tolerance in Cryptography, 2006
Proceedings of the Fault Diagnosis and Tolerance in Cryptography, 2006
2005
Remarks on Calculation of Autocorrelation on Finite Dyadic Groups by Local Transformations of Decision Diagrams.
Proceedings of the Computer Aided Systems Theory, 2005
Proceedings of the 11th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2005), 2005
Proceedings of the Fifth International Conference on Application of Concurrency to System Design (ACSD 2005), 2005
2004
IEEE Trans. Inf. Theory, 2004
Spectral Techniques in Binary and MultipleValued Switching Theory: A Review of Results in the Decade 19912000.
J. Multiple Valued Log. Soft Comput., 2004
Construction of linearly transformed planar BDD by Walsh coefficients.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
Proceedings of the Proceedings IEEE INFOCOM 2004, 2004
Robust Protection against FaultInjection Attacks on Smart Cards Implementing the Advanced Encryption Standard.
Proceedings of the 2004 International Conference on Dependable Systems and Networks (DSN 2004), 28 June, 2004
Differential Fault Analysis Attack Resistant Architectures for the Advanced Encryption Standard.
Proceedings of the Smart Card Research and Advanced Applications VI, 2004
2003
IEEE/ACM Trans. Netw., 2003
IEEE Trans. Inf. Theory, 2003
IEEE Trans. Computers, 2003
Cycles identifying vertices and edges in binary hypercubes and 2dimensional tori.
Discret. Appl. Math., 2003
2002
Fault Tolerant Unicast Wormhole Routing in Irregular Computer Networks.
Proceedings of the International Conference on Parallel and Distributed Computing Systems, 2002
Proceedings of the 8th IEEE International OnLine Testing Workshop (IOLTW 2002), 2002
Proceedings of the 12th ACM Great Lakes Symposium on VLSI 2002, 2002
2001
Proceedings of the 31st IEEE International Symposium on MultipleValued Logic, 2001
Proceedings of the 7th IEEE International OnLine Testing Workshop (IOLTW 2001), 2001
Proceedings of the Euromicro Symposium on Digital Systems Design 2001 (EuroDSD 2001), 2001
Proceedings of the Applied Algebra, 2001
1999
Inf. Process. Lett., 1999
Faulttolerant Message Routing in Computer Networks.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 1999
1998
Integrated OnLine and OffLine Error Detection Mechanisms in the Coding Theory Framework.
VLSI Design, 1998
IEEE Trans. Inf. Theory, 1998
Proceedings of the Parallel and Distributed Processing, 10 IPPS/SPDP'98 Workshops Held in Conjunction with the 12th International Parallel Processing Symposium and 9th Symposium on Parallel and Distributed Processing, Orlando, Florida, USA, March 30, 1998
1997
Exhaustive and NearExhaustive Memory Testing Techniques and their BIST Implementations.
J. Electron. Test., 1997
1996
J. Electron. Test., 1996
1995
IEEE Trans. Computers, 1995
Proceedings of the 1995 European Design and Test Conference, 1995
1994
IEEE Trans. Computers, 1994
Proceedings of the Proceedings IEEE International Test Conference 1994, 1994
Proceedings of the FieldProgrammable Logic, 1994
1993
IEEE Trans. Computers, 1993
Proceedings of the Algebraic Coding, 1993
1992
J. VLSI Signal Process., 1992
Proceedings of the 10th IEEE VLSI Test Symposium (VTS'92), 1992
Proceedings of the 10th IEEE VLSI Test Symposium (VTS'92), 1992
Proceedings of the Digest of Papers: FTCS22, 1992
1991
IEEE Des. Test Comput., 1991
Proceedings of the 9th IEEE VLSI Test Symposium (VTS'91), 1991
Proceedings of the Proceedings IEEE International Test Conference 1991, 1991
Aliasing and Diagnosis Probability in MISR and STUMPS Using a General Error Model.
Proceedings of the Proceedings IEEE International Test Conference 1991, 1991
1990
IEEE Trans. Acoust. Speech Signal Process., 1990
IEEE Trans. Computers, 1990
IEEE Trans. Computers, 1990
Identification of faulty processing elements by spacetime compression of test responses.
Proceedings of the Proceedings IEEE International Test Conference 1990, 1990
1989
IEEE Trans. Inf. Theory, 1989
IEEE Trans. Computers, 1989
1988
IEEE Trans. Computers, 1988
Proceedings of the Proceedings International Test Conference 1988, 1988
1987
IEEE Trans. Computers, 1987
1986
Statistical and computational performance of a class of generalized Wiener filters.
IEEE Trans. Inf. Theory, 1986
1985
IEEE Trans. Inf. Theory, 1985
1984
Proceedings of the 21st Design Automation Conference, 1984
1983
IEEE Trans. Computers, 1983
Detection and identification of input/output stuckat and bridging faults in combinational and sequential VLSI networks by universal tests.
Integr., 1983
Testing Computer Hardware through Data Compression in Space and Time.
Proceedings of the Proceedings International Test Conference 1983, 1983
1982
Universal Tests Detecting Input/Output Faults in Almost All Devices.
Proceedings of the Proceedings International Test Conference 1982, 1982
1981
Weight distribution of translates, covering radius, and perfect codes correcting errors of given weights.
IEEE Trans. Inf. Theory, 1981
An Approach for Error Detection and Error Correction in Distributed Systems Computing Numerical Functions.
IEEE Trans. Computers, 1981
1980
Detection and Location of Input and Feedback Bridging Faults Among Input and Output Lines.
IEEE Trans. Computers, 1980
Detecting bridging and stuckat faults at input and output pins of standard digital components.
Proceedings of the 17th Design Automation Conference, 1980
1979
Fourier Transform over Finite Groups for Error Detection and Error Correction in Computation Channels
Inf. Control., March, 1979
IEEE Trans. Inf. Theory, 1979
1978
Discret. Math., 1978
Discret. Math., 1978
1977
Inf. Control., July, 1977
Harmonic Analysis over Finite Commutative Groups in Linearization Problems For Systems of Logical Functions
Inf. Control., February, 1977
IEEE Trans. Computers, 1977
Error Detection in Digital Devices and Computer Programs with the Aid of Linear Recurrent Equations Over Finite Commutativs Groups.
IEEE Trans. Computers, 1977
Linear Checking Equations and ErrorCorrecting Capability for Computation Channels.
Proceedings of the Information Processing, 1977