Victor Varshavsky

According to our database1, Victor Varshavsky authored at least 19 papers between 1970 and 2004.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of five.

Timeline

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PhD thesis 
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Links

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Bibliography

2004
Fuzzy decision diagram realization by analog CMOS summing amplifiers.
Proceedings of the 2004 11th IEEE International Conference on Electronics, 2004

2003
Increasing Implementability of beta-driven Threshold Checkers.
Proceedings of the 9th IEEE International On-Line Testing Symposium (IOLTS 2003), 2003

2002
GALA Approach in Design of Asynchronous Control for Counterflow Pipeline Processor.
Proceedings of the 1st IEEE International Workshop on Electronic Design, 2002

GALA (Globally Asynchronous - Locally Arbitrary) Design.
Proceedings of the Concurrency and Hardware Design, Advances in Petri Nets, 2002

2001
A Neuron-MOS Threshold Element with Switching Capacitors.
Proceedings of the Computational Intelligence, 2001

1999
Beta-CMOS Artificial Neuron and Implementability Limits.
Proceedings of the Engineering Applications of Bio-Inspired Artificial Neural Networks, 1999

Implementability restrictions of the beta-CMOS artificial neuron.
Proceedings of the 6th IEEE International Conference on Electronics, Circuits and Systems, 1999

Current Sensor on the Base of Permanent Pre-chargeable Amplifier.
Proceedings of the 9th Great Lakes Symposium on VLSI (GLS-VLSI '99), 1999

Learning Experiments with CMOS Artificial Neuron.
Proceedings of the Computational Intelligence, 1999

1998
CMOS artificial neuron on the base of β-driven threshold element.
Proceedings of the IEEE International Conference on Systems, Man and Cybernetics, 1998

Simple CMOS Learnable Threshold Element.
Proceedings of the International ICSC / IFAC Symposium on Neural Computation (NC 1998), 1998

beta-Driven Threshold Elements.
Proceedings of the 8th Great Lakes Symposium on VLSI (GLS-VLSI '98), 1998

1996
Asynchronous Control Device Design by Net Model Behavior Simulation.
Proceedings of the Application and Theory of Petri Nets 1996, 1996

1995
Designing Self-Timed Devices Using the Finite Automaton Model.
IEEE Des. Test Comput., 1995

Designing an asynchronous pipeline token ring interface.
Proceedings of the Second Working Conference on Asynchronous Design Methodologies, 1995

1994
Analysis and Identification of Speed-Independent Circuits on an Event Model.
Formal Methods Syst. Des., 1994

Change Diagram : A behavioural model for very speed VLSI circuit/highly parallel systems.
Proceedings of the Second Euromicro Workshop on Parallel and Distributed Processing, 1994

1992
Analysis and Identification of Self-Timed Circuits.
Proceedings of the Designing Correct Circuits, 1992

1970
Synchronization of Interacting Automata.
Math. Syst. Theory, 1970


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