Vladislav Tartakovsky

According to our database, Vladislav Tartakovsky authored at least 8 papers between 2012 and 2021.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2021

FPGA Realization of the Reconfigurable Mesh Counting Algorithm.

Yosi Ben-Asher, Esti Stein, Vladislav Tartakovsky

J. Circuits Syst. Comput., 2021

2020

Speeding up the computations by using Non-Deterministic Branching programs instead of Boolean Cirquits.

Vladislav Tartakovsky

PhD thesis, 2020

2019

Efficient Conversion of Boolean Circuits to Nondeterministic Branching Programs.

Yosi Ben-Asher, Vladislav Tartakovsky

Proceedings of the IEEE International Parallel and Distributed Processing Symposium Workshops, 2019

2018

An FPGA Scalable Parallel Viterbi Decoder.

Yosi Ben-Asher, Vladislav Tartakovsky, Katrina Portman, Orr Zilberman, Avishi Hadar

Proceedings of the 12th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2018

2017

Generating ASIPs with Reduced Number of Connections to the Register-File.

Yosi Ben-Asher, Irina Lipov, Vladislav Tartakovsky, Dror Tiv

Int. J. Parallel Program., 2017

2016

Student Research Poster: Compiling Boolean Circuits to Non-deterministic Branching Programs to be Implemented by Light Switching Circuits.

Vladislav Tartakovsky

Proceedings of the 2016 International Conference on Parallel Architectures and Compilation, 2016

2014

Using Multi-op Instructions as a Way to Generate ASIPs with Optimized Pipeline Structure.

Yosi Ben-Asher, Irina Lipov, Vladislav Tartakovsky, Dror Tiv

Proceedings of the 22nd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2014

2012

Fast Evaluation of Boolean Circuits Based on Two-Players Game and Optical Connectivity Circuits.

Yosi Ben-Asher, Eldar Fisher, Gadi Haber, Vladislav Tartakovsky

Proceedings of the 41st International Conference on Parallel Processing, 2012