Walter Aloisi

According to our database1, Walter Aloisi authored at least 13 papers between 2002 and 2008.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2008
Gated-Clock Design of Linear-Feedback Shift Registers.
IEEE Trans. Circuits Syst. II Express Briefs, 2008

Design methodology of Miller frequency compensation with current buffer/amplifier.
IET Circuits Devices Syst., 2008

2007
Miller Compensation: Optimization with Current Buffer/Amplifier.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

2005
Design and Comparison of Very Low-Voltage CMOS Output Stages.
IEEE Trans. Circuits Syst. I Regul. Pap., 2005

Efficiency model of boost dc-dc PWM converters.
Int. J. Circuit Theory Appl., 2005

Analysis and optimization of a low-voltage class-AB output stage.
Proceedings of the 12th IEEE International Conference on Electronics, 2005

Guidelines for designing class-AB output stages.
Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005

2004
Exploiting the high-frequency performance of low-voltage low-power SC filters.
IEEE Trans. Circuits Syst. II Express Briefs, 2004

Low-voltage linear voltage regulator suitable for memories.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

2003
Analysis, modelling and optimization of a gain boosted telescopic amplifier.
Int. J. Circuit Theory Appl., 2003

Design of low-voltage low-power SC filters for high-frequency applications.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

A 1-V CMOS output stage with high linearity.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

2002
Analysis and optimization of gain-boosted telescopic amplifiers.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002


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