Wangchen Dai

Orcid: 0000-0002-5192-1649

According to our database1, Wangchen Dai authored at least 17 papers between 2014 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
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PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
REALISE-IoT: RISC-V-Based Efficient and Lightweight Public-Key System for IoT Applications.
IEEE Internet Things J., January, 2024

Revisiting Keccak and Dilithium Implementations on ARMv7-M.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2024

Number-Theoretic Transform Architecture for Fully Homomorphic Encryption from Hypercube Topology.
IACR Cryptol. ePrint Arch., 2024

2023
High-performance and Configurable SW/HW Co-design of Post-quantum Signature CRYSTALS-Dilithium.
ACM Trans. Reconfigurable Technol. Syst., September, 2023

IoT-based generalized multi-granulation sequential three-way decisions.
Comput. Commun., September, 2023

Algorithm-Hardware Co-Design of Split-Radix Discrete Galois Transformation for KyberKEM.
IEEE Trans. Emerg. Top. Comput., 2023

XNET: A Real-Time Unified Secure Inference Framework Using Homomorphic Encryption.
IACR Cryptol. ePrint Arch., 2023

Implementing and Benchmarking Word-Wise Homomorphic Encryption Schemes on GPU.
IACR Cryptol. ePrint Arch., 2023

Leveraging GPU in Homomorphic Encryption: Framework Design and Analysis of BFV Variants.
IACR Cryptol. ePrint Arch., 2023

Fully Homomorphic Encryption-Based Protocols for Enhanced Private Set Intersection Functionalities.
IACR Cryptol. ePrint Arch., 2023

Yet another Improvement of Plantard Arithmetic for Faster Kyber on Low-end 32-bit IoT Devices.
CoRR, 2023

2022
High-Throughput GPU Implementation of Dilithium Post-Quantum Digital Signature.
CoRR, 2022

2021
Scalable Fully Pipelined Hardware Architecture for In-Network Aggregated AllReduce Communication.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021

2018
FFT-Based McLaughlin's Montgomery Exponentiation without Conditional Selections.
IEEE Trans. Computers, 2018

Spectral arithmetic in Montgomery modular multiplication.
J. Cryptogr. Eng., 2018

2017
Area-Time Efficient Architecture of FFT-Based Montgomery Multiplication.
IEEE Trans. Computers, 2017

2014
Time-efficient computation of digit serial Montgomery multiplication.
Proceedings of the 2014 International Symposium on Integrated Circuits (ISIC), 2014


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