Wei Jiang

Affiliations:
  • University of California, Department of Computer Science, Los Angeles, CA, USA


According to our database1, Wei Jiang authored at least 11 papers between 2006 and 2011.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2011
Automatic memory partitioning and scheduling for throughput and power optimization.
ACM Trans. Design Autom. Electr. Syst., 2011

Pattern-Mining for Behavioral Synthesis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011

2010
Accelerating Monte Carlo based SSTA using FPGA.
Proceedings of the ACM/SIGDA 18th International Symposium on Field Programmable Gate Arrays, 2010

A generalized control-flow-aware pattern recognition algorithm for behavioral synthesis.
Proceedings of the Design, Automation and Test in Europe, 2010

2009
Synthesis Algorithm for Application-Specific Homogeneous Processor Networks.
IEEE Trans. Very Large Scale Integr. Syst., 2009

2008
Pattern-based behavior synthesis for FPGA resource reduction.
Proceedings of the ACM/SIGDA 16th International Symposium on Field Programmable Gate Arrays, 2008

Scheduling with integer time budgeting for low-power optimization.
Proceedings of the 13th Asia South Pacific Design Automation Conference, 2008

2007
Synthesis of an application-specific soft multiprocessor system.
Proceedings of the ACM/SIGDA 15th International Symposium on Field Programmable Gate Arrays, 2007

2006
Platform-Based Behavior-Level and System-Level Synthesis.
Proceedings of the 2006 IEEE International SOC Conference, Austin, Texas, USA, 2006

Platform-based resource binding using a distributed register-file microarchitecture.
Proceedings of the 2006 International Conference on Computer-Aided Design, 2006

Behavior and communication co-optimization for systems with sequential communication media.
Proceedings of the 43rd Design Automation Conference, 2006


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