Karthik Gururaj

According to our database1, Karthik Gururaj authored at least 22 papers between 2007 and 2019.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2019
Scalable Low-Latency Persistent Neural Machine Translation on CPU Server with Multiple FPGAs.
Proceedings of the International Conference on Field-Programmable Technology, 2019

2014
Accelerator-Rich Architectures: Opportunities and Progresses.
Proceedings of the 51st Annual Design Automation Conference 2014, 2014

2013
Energy Efficient Computing Using Static-Dynamic Co-optimizations.
PhD thesis, 2013

Efficient compilation of CUDA kernels for high-performance computing on FPGAs.
ACM Trans. Embed. Comput. Syst., 2013

Architecture support for custom instructions with memory operations.
Proceedings of the 2013 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2013

2012
Task-Level Data Model for Hardware Synthesis Based on Concurrent Collections.
J. Electr. Comput. Eng., 2012

2011
An energy-efficient adaptive hybrid cache.
Proceedings of the 2011 International Symposium on Low Power Electronics and Design, 2011

Assuring application-level correctness against soft errors.
Proceedings of the 2011 IEEE/ACM International Conference on Computer-Aided Design, 2011

Multilevel Granularity Parallelism Synthesis on FPGAs.
Proceedings of the IEEE 19th Annual International Symposium on Field-Programmable Custom Computing Machines, 2011

Domain-specific processor with 3D integration for medical image processing.
Proceedings of the 22nd IEEE International Conference on Application-specific Systems, 2011

2010
Accelerating Monte Carlo based SSTA using FPGA.
Proceedings of the ACM/SIGDA 18th International Symposium on Field Programmable Gate Arrays, 2010

2009
Synthesis Algorithm for Application-Specific Homogeneous Processor Networks.
IEEE Trans. Very Large Scale Integr. Syst., 2009

FCUDA: Enabling efficient compilation of CUDA kernels onto FPGAs.
Proceedings of the IEEE 7th Symposium on Application Specific Processors, 2009

High-performance CUDA kernel execution on FPGAs.
Proceedings of the 23rd international conference on Supercomputing, 2009

Revisiting bitwidth optimizations.
Proceedings of the ACM/SIGDA 17th International Symposium on Field Programmable Gate Arrays, 2009

Synthesis of reconfigurable high-performance multicore systems.
Proceedings of the ACM/SIGDA 17th International Symposium on Field Programmable Gate Arrays, 2009

Evaluation of Static Analysis Techniques for Fixed-Point Precision Optimization.
Proceedings of the FCCM 2009, 2009

Energy efficient multiprocessor task scheduling under input-dependent variation.
Proceedings of the Design, Automation and Test in Europe, 2009

2008
MC-Sim: an efficient simulation tool for MPSoC designs.
Proceedings of the 2008 International Conference on Computer-Aided Design, 2008

Communication bottleneck in hardware-software partitioning.
Proceedings of the ACM/SIGDA 16th International Symposium on Field Programmable Gate Arrays, 2008

2007
Controllability-Driven Peak Dynamic Power Estimation for VLSI Circuits.
J. Low Power Electron., 2007

Controllability-driven Power Virus Generation for Digital Circuits.
Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007


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