Guoling Han

According to our database1, Guoling Han authored at least 17 papers between 2003 and 2009.

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Bibliography

2009
Synthesis Algorithm for Application-Specific Homogeneous Processor Networks.
IEEE Trans. Very Large Scale Integr. Syst., 2009

Synthesis of reconfigurable high-performance multicore systems.
Proceedings of the ACM/SIGDA 17th International Symposium on Field Programmable Gate Arrays, 2009

2008
MC-Sim: an efficient simulation tool for MPSoC designs.
Proceedings of the 2008 International Conference on Computer-Aided Design, 2008

Exploring power management in multi-core systems.
Proceedings of the 13th Asia South Pacific Design Automation Conference, 2008

2007
Accelerating Sequential Applications on CMPs Using Core Spilling.
IEEE Trans. Parallel Distributed Syst., 2007

Synthesis of an application-specific soft multiprocessor system.
Proceedings of the ACM/SIGDA 15th International Symposium on Field Programmable Gate Arrays, 2007

Performance modeling for early analysis of multi-core systems.
Proceedings of the 5th International Conference on Hardware/Software Codesign and System Synthesis, 2007

2006
Architecture and Compiler Optimizations for Data Bandwidth Improvement in Configurable Processors.
IEEE Trans. Very Large Scale Integr. Syst., 2006

Platform-Based Behavior-Level and System-Level Synthesis.
Proceedings of the 2006 IEEE International SOC Conference, Austin, Texas, USA, 2006

Behavior and communication co-optimization for systems with sequential communication media.
Proceedings of the 43rd Design Automation Conference, 2006

2005
Architecture and compilation for data bandwidth improvement in configurable embedded processors.
Proceedings of the 2005 International Conference on Computer-Aided Design, 2005

Instruction set extension with shadow registers for configurable processors.
Proceedings of the ACM/SIGDA 13th International Symposium on Field Programmable Gate Arrays, 2005

Bitwidth-aware scheduling and binding in high-level synthesis.
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

2004
Architecture and synthesis for on-chip multicycle communication.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004

Application-specific instruction generation for configurable processor architectures.
Proceedings of the ACM/SIGDA 12th International Symposium on Field Programmable Gate Arrays, 2004

2003
Architectural Synthesis Integrated with Global Placement for Multi-Cycle Communication.
Proceedings of the 2003 International Conference on Computer-Aided Design, 2003

Architecture and synthesis for multi-cycle on-chip communication.
Proceedings of the 1st IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2003


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