Miodrag Potkonjak

According to our database1, Miodrag Potkonjak authored at least 359 papers between 1989 and 2019.

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Bibliography

2019
Circuit power optimization using pipelining and dual-supply voltage assignment.
Integration, 2019

Evolutionary Trigger Set Generation for DNN Black-Box Watermarking.
CoRR, 2019

2018
Efficient Image Sensor Subsampling for DNN-Based Image Classification.
Proceedings of the International Symposium on Low Power Electronics and Design, 2018

Efficient and Secure Group Key Management in IoT using Multistage Interconnected PUF.
Proceedings of the International Symposium on Low Power Electronics and Design, 2018

Watermarking deep neural networks for embedded systems.
Proceedings of the International Conference on Computer-Aided Design, 2018

Securing interconnected PUF network with reconfigurability.
Proceedings of the 2018 IEEE International Symposium on Hardware Oriented Security and Trust, 2018

2017
Pruning Filters and Classes: Towards On-Device Customization of Convolutional Neural Networks.
Proceedings of the 1st International Workshop on Embedded and Mobile Deep Learning (Deep Learning for Mobile Systems and Applications), 2017

A low-power APUF-based environmental abnormality detection framework.
Proceedings of the 2017 IEEE/ACM International Symposium on Low Power Electronics and Design, 2017

20 Years of research on intellectual property protection.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

Pruning ConvNets Online for Efficient Specialist Models.
Proceedings of the 2017 IEEE Conference on Computer Vision and Pattern Recognition Workshops, 2017

2016
An ultra-low energy PUF matching security platform using programmable delay lines.
Proceedings of the 11th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2016

Securing embedded systems and their IPs with digital reconfigurable PUFs.
Proceedings of the 26th International Workshop on Power and Timing Modeling, 2016

Enabling environmentally-powered indoor sensor networks with dynamic routing and operation.
Proceedings of the 26th International Workshop on Power and Timing Modeling, 2016

Coarse-grained learning-based dynamic voltage frequency scaling for video decoding.
Proceedings of the 26th International Workshop on Power and Timing Modeling, 2016

Pipelining for dual supply voltages.
Proceedings of the 26th International Workshop on Power and Timing Modeling, 2016

An Energy-Efficient PUF Design: Computing While Racing.
Proceedings of the 2016 International Symposium on Low Power Electronics and Design, 2016

Energy-efficient fault tolerance approach for internet of things applications.
Proceedings of the 35th International Conference on Computer-Aided Design, 2016

Retiming and dual-supply voltage based energy optimization for DSP applications.
Proceedings of the 2016 IEEE International Conference on Acoustics, 2016

2015
Nano Meets Security: Exploring Nanoelectronic Devices for Security Applications.
Proceedings of the IEEE, 2015

Phase Change Memory Write Cost Minimization by Data Encoding.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2015

Data integrity attacks and defenses for Intel lab sensor network.
Proceedings of the 2nd IEEE World Forum on Internet of Things, 2015

Securing wireless body sensor networks using bijective function-based hardware primitive.
Proceedings of the Tenth IEEE International Conference on Intelligent Sensors, 2015

Digital PUF using intentional faults.
Proceedings of the Sixteenth International Symposium on Quality Electronic Design, 2015

The digital bidirectional function as a hardware security primitive: Architecture and applications.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2015

Stable and secure delay-based physical unclonable functions using device aging.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

Energy Saving Using Scenario Based Sensor Selection on Medical Shoes.
Proceedings of the 2015 International Conference on Healthcare Informatics, 2015

DA Vision 2015: From Here to Eternity.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015

Learning-Based Localized Offloading with Resource-Constrained Data Centers.
Proceedings of the 2015 International Conference on Cloud and Autonomic Computing, 2015

Multiple constant multiplication implementations in near-threshold computing systems.
Proceedings of the 2015 IEEE International Conference on Acoustics, 2015

Data protection using recursive inverse function.
Proceedings of the 25th International Conference on Field Programmable Logic and Applications, 2015

Adaptive characterization and emulation of delay-based physical unclonable functions using statistical models.
Proceedings of the 52nd Annual Design Automation Conference, 2015

2014
Self-Consistency and Consistency-Based Detection and Diagnosis of Malicious Circuitry.
IEEE Trans. VLSI Syst., 2014

Energy Efficient Collaborative Sensing-Based Design: Soft Keyboard Case Study.
IEEE Trans. Human-Machine Systems, 2014

Public Physical Unclonable Functions.
Proceedings of the IEEE, 2014

VeSense: High-performance and energy-efficient vehicular sensing platform.
Pervasive and Mobile Computing, 2014

Leveraging human gait characteristics towards self-sustained operation of low-power mobile devices.
Proceedings of the IEEE World Forum on Internet of Things, 2014

Low-power semantic fault-detection in multi-sensory mobile health monitoring systems.
Proceedings of the IEEE World Forum on Internet of Things, 2014

Addressing biosignal data sharing security issues with robust watermarking.
Proceedings of the Eleventh Annual IEEE International Conference on Sensing, 2014

Security Defenses for Vulnerable Medical Sensor Network.
Proceedings of the 2014 IEEE International Conference on Healthcare Informatics, 2014

Matched Digital PUFs for Low Power Security in Implantable Medical Devices.
Proceedings of the 2014 IEEE International Conference on Healthcare Informatics, 2014

On Admitting Sensor Fault Tolerance While Achieving Secure Biosignal Data Sharing.
Proceedings of the 2014 IEEE International Conference on Healthcare Informatics, 2014

Security of IoT systems: design challenges and opportunities.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2014

Hardware obfuscation using PUF-based logic.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2014

A secure and unclonable embedded system using instruction-level PUF authentication.
Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014

Robust and flexible FPGA-based digital PUF.
Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014

A Robust Watermarking Technique for Secure Sharing of BASN Generated Medical Data.
Proceedings of the IEEE International Conference on Distributed Computing in Sensor Systems, 2014

Quo vadis, PUF?: Trends and challenges of emerging physical-disorder based security.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

Provably minimal energy using coordinated DVS and power gating.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

Techniques for Foundry Identification.
Proceedings of the 51st Annual Design Automation Conference 2014, 2014

Reverse Engineering and Prevention Techniques for Physical Unclonable Functions Using Side Channels.
Proceedings of the 51st Annual Design Automation Conference 2014, 2014

Coordinated and adaptive power gating and dynamic voltage scaling for energy minimization.
Proceedings of the IEEE 25th International Conference on Application-Specific Systems, 2014

A digital PUF-based IP protection architecture for network embedded systems.
Proceedings of the tenth ACM/IEEE symposium on Architectures for networking and communications systems, 2014

Secure remote sensing and communication using digital pufs.
Proceedings of the tenth ACM/IEEE symposium on Architectures for networking and communications systems, 2014

2013
Behavior-oriented data resource management in medical sensing systems.
TOSN, 2013

Quantitative Intellectual Property Protection Using Physical-Level Characterization.
IEEE Trans. Information Forensics and Security, 2013

mHealthMon: Toward Energy-Efficient and Distributed Mobile Health Monitoring Using Parallel Offloading.
J. Medical Systems, 2013

Fault-Tolerant and Low-Power Sampling Schedules for Localized BASNs.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2013

Energy attacks and defense techniques for wireless systems.
Proceedings of the Sixth ACM Conference on Security and Privacy in Wireless and Mobile Networks, 2013

VeSense: Energy-Efficient Vehicular Sensing.
Proceedings of the 77th IEEE Vehicular Technology Conference, 2013

Embedded tutorials: Embedded tutorial 1: Cell-aware test-from gates to transistors.
Proceedings of the 21st IEEE/IFIP International Conference on VLSI and System-on-Chip, 2013

Gate Sizing Under Uncertainty.
Proceedings of the VLSI-SoC: At the Crossroads of Emerging Trends, 2013

Gate sizing in the presence of gate switching activity and input vector control.
Proceedings of the 21st IEEE/IFIP International Conference on VLSI and System-on-Chip, 2013

Optimizing the configuration and control of a novel human-powered energy harvesting system.
Proceedings of the 2013 23rd International Workshop on Power and Timing Modeling, 2013

Maximizing yield in Near-Threshold Computing under the presence of process variation.
Proceedings of the 2013 23rd International Workshop on Power and Timing Modeling, 2013

Driving low-power wearable systems with an adaptively-controlled foot-strike scavenging platform.
Proceedings of the 17th Annual International Symposium on Wearable Computers. ISWC 2013, 2013

Digital bimodal function: An ultra-low energy security primitive.
Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED), 2013

A temperature-aware synthesis approach for simultaneous delay and leakage optimization.
Proceedings of the 2013 IEEE 31st International Conference on Computer Design, 2013

Malicious circuitry detection using fast timing characterization via test points.
Proceedings of the 2013 IEEE International Symposium on Hardware-Oriented Security and Trust, 2013

The bidirectional polyomino partitioned PPUF as a hardware security primitive.
Proceedings of the IEEE Global Conference on Signal and Information Processing, 2013

Aging-based leakage energy reduction in FPGAs.
Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013

Low power FPGA design using post-silicon device aging (abstract only).
Proceedings of the 2013 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2013

Modeling Mobile Cloud Computing Using Greenmetrics.
Proceedings of the 8th International Workshop on Feedback Computing, 2013

Toward energy-efficient and distributed mobile health monitoring using parallel offloading.
Proceedings of the 35th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2013

The undetectable and unprovable hardware trojan horse.
Proceedings of the 50th Annual Design Automation Conference 2013, 2013

Hardware security strategies exploiting nanoelectronic circuits.
Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013

2012
Scalable Hardware Trojan Diagnosis.
IEEE Trans. VLSI Syst., 2012

Gate Characterization Using Singular Value Decomposition: Foundations and Applications.
IEEE Trans. Information Forensics and Security, 2012

Guest Editorial Integrated Circuit and System Security.
IEEE Trans. Information Forensics and Security, 2012

Nanoelectronic Solutions for Hardware Security.
IACR Cryptology ePrint Archive, 2012

Wireless security techniques for coordinated manufacturing and on-line hardware trojan detection.
Proceedings of the Fifth ACM Conference on Security and Privacy in Wireless and Mobile Networks, 2012

Power constrained sensor sample selection for improved form factor and lifetime in localized BANs.
Proceedings of the Wireless Health 2012, 2012

Nano-PPUF: A Memristor-Based Security Primitive.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2012

Semantics-driven sensor configuration for energy reduction in medical sensor networks.
Proceedings of the International Symposium on Low Power Electronics and Design, 2012

Provably complete hardware Trojan detection using test point insertion.
Proceedings of the 2012 IEEE/ACM International Conference on Computer-Aided Design, 2012

Using standardized quantization for multi-party PPUF matching: Foundations and applications.
Proceedings of the 2012 IEEE/ACM International Conference on Computer-Aided Design, 2012

A Benign Hardware Trojan on FPGA-based embedded systems.
Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012

Securing netlist-level FPGA design through exploiting process variation and degradation.
Proceedings of the ACM/SIGDA 20th International Symposium on Field Programmable Gate Arrays, 2012

Energy and Cost Reduction in Localized Multisensory Systems through Application-Driven Compression.
Proceedings of the 2012 Data Compression Conference, Snowbird, UT, USA, April 10-12, 2012, 2012

Optimization intensive energy harvesting.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

Dynamically reconfigurable hybrid cache: An energy-efficient last-level cache design.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

Hardware Trojan horse benchmark via optimal creation and placement of malicious circuitry.
Proceedings of the 49th Annual Design Automation Conference 2012, 2012

Coding-based energy minimization for phase change memory.
Proceedings of the 49th Annual Design Automation Conference 2012, 2012

Can EDA combat the rise of electronic counterfeiting?
Proceedings of the 49th Annual Design Automation Conference 2012, 2012

2011
Malicious Circuitry Detection Using Thermal Conditioning.
IEEE Trans. Information Forensics and Security, 2011

Scalable consistency-based hardware trojan detection and diagnosis.
Proceedings of the 5th International Conference on Network and System Security, 2011

What to read? With whom to work? Where to publish? - Scientific techniques for organizing and conducting engineering research.
Proceedings of the 2011 IEEE International Conference on Microelectronic Systems Education, 2011

Energy efficient E-textile based portable keyboard.
Proceedings of the 2011 International Symposium on Low Power Electronics and Design, 2011

Matched public PUF: ultra low energy security platform.
Proceedings of the 2011 International Symposium on Low Power Electronics and Design, 2011

Robust passive hardware metering.
Proceedings of the 2011 IEEE/ACM International Conference on Computer-Aided Design, 2011

Integrated circuit digital rights management techniques using physical level characterization.
Proceedings of the 11th ACM Workshop on Digital Rights Management, 2011

Integrated circuit security techniques using variable supply voltage.
Proceedings of the 48th Design Automation Conference, 2011

Differential public physically unclonable functions: architecture and applications.
Proceedings of the 48th Design Automation Conference, 2011

Device aging-based physically unclonable functions.
Proceedings of the 48th Design Automation Conference, 2011

2010
Nonparametric combinatorial regression for shape constrained modeling.
IEEE Trans. Signal Processing, 2010

Experimental analysis of a mobile health system for mood disorders.
IEEE Trans. Information Technology in Biomedicine, 2010

Field Division Routing.
EURASIP J. Wireless Comm. and Networking, 2010

Variability: For headache and profit.
IEEE Design & Test of Computers, 2010

Energy optimization in wireless medical systems using physiological behavior.
Proceedings of Wireless Health 2010, 2010

Optimized Operation for Infrastructure-Supported Wireless Sensor Networks.
Proceedings of the Seventh Annual IEEE Communications Society Conference on Sensor, 2010

Leakage minimization using self sensing and thermal management.
Proceedings of the 2010 International Symposium on Low Power Electronics and Design, 2010

A framework for optimization of operational latency in wireless networks.
Proceedings of the 15th IEEE Symposium on Computers and Communications, 2010

Scalable segmentation-based malicious circuitry detection and diagnosis.
Proceedings of the 2010 International Conference on Computer-Aided Design, 2010

Gate-level characterization: foundations and hardware security applications.
Proceedings of the 47th Design Automation Conference, 2010

Synthesis of trustable ICs using untrusted CAD tools.
Proceedings of the 47th Design Automation Conference, 2010

2009
Techniques for Design and Implementation of Secure Reconfigurable PUFs.
TRETS, 2009

Energy-aware post settings: a study on performance gain by adding relaying nodes in wireless ad-hoc networks.
Proceedings of the 2009 IEEE Wireless Communications and Networking Conference, 2009

N-version temperature-aware scheduling and binding.
Proceedings of the 2009 International Symposium on Low Power Electronics and Design, 2009

SVD-Based Ghost Circuitry Detection.
Proceedings of the Information Hiding, 11th International Workshop, 2009

Hardware-Based Public-Key Cryptography with Public Physically Unclonable Functions.
Proceedings of the Information Hiding, 11th International Workshop, 2009

Energy minimization for real-time systems with non-convex and discrete operation modes.
Proceedings of the Design, Automation and Test in Europe, 2009

Hardware aging-based software metering.
Proceedings of the Design, Automation and Test in Europe, 2009

Hardware Trojan horse detection using gate-level characterization.
Proceedings of the 46th Design Automation Conference, 2009

Energy Balancing Routing Schemes for Low-Power Wireless Networks.
Proceedings of the 7th Annual Conference on Communication Networks and Services Research, 2009

Localized Probabilistic Routing for Data Gathering in Wireless Ad Hoc Networks.
Proceedings of the 7th Annual Conference on Communication Networks and Services Research, 2009

2008
General Methodology for Soft-Error-Aware Power Optimization Using Gate Sizing.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2008

Challenging benchmark for location discovery in ad hoc networks: foundations and applications.
Proceedings of the 9th ACM Interational Symposium on Mobile Ad Hoc Networking and Computing, 2008

Testing Techniques for Hardware Security.
Proceedings of the 2008 IEEE International Test Conference, 2008

Trusted Integrated Circuits: A Nondestructive Hidden Characteristics Extraction Approach.
Proceedings of the Information Hiding, 10th International Workshop, 2008

Lightweight secure PUFs.
Proceedings of the 2008 International Conference on Computer-Aided Design, 2008

(Bio)-behavioral CAD.
Proceedings of the 45th Design Automation Conference, 2008

Input vector control for post-silicon leakage current minimization in the presence of manufacturing variability.
Proceedings of the 45th Design Automation Conference, 2008

Scheduling with integer time budgeting for low-power optimization.
Proceedings of the 13th Asia South Pacific Design Automation Conference, 2008

2007
Techniques for maintaining connectivity in wireless ad-hoc networks under energy constraints.
ACM Trans. Embedded Comput. Syst., 2007

Experimental Investigation of IEEE 802.15.4 Transmission Power Control and Interference Minimization.
Proceedings of the Fourth Annual IEEE Communications Society Conference on Sensor, 2007

Optimization for Real-Time Systems with Non-convex Power Versus Speed Models.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2007

Soft Error-Aware Power Optimization Using Gate Sizing.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2007

Introduction to Digital Design: A Paradigm-Based Approach.
Proceedings of the IEEE International Conference on Microelectronic Systems Education, 2007

Integration of Statistical Techniques in the Design Curriculum.
Proceedings of the IEEE International Conference on Microelectronic Systems Education, 2007

Hardware Security: Preparing Students for the Next Design Frontier.
Proceedings of the IEEE International Conference on Microelectronic Systems Education, 2007

Reducing Energy of DRAM/Flash Memory System by OS-controlled Data Refresh.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Statistical timing analysis using Kernel smoothing.
Proceedings of the 25th International Conference on Computer Design, 2007

Remote activation of ICs for piracy prevention and digital right management.
Proceedings of the 2007 International Conference on Computer-Aided Design, 2007

Minimizing Global Interconnect in DSP Systems using Bypassing.
Proceedings of the IEEE International Conference on Acoustics, 2007

CAD-based Security, Cryptography, and Digital Rights Management.
Proceedings of the 44th Design Automation Conference, 2007

2006
A statistical methodology for wire-length prediction.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2006

Protecting Combinational Logic Synthesis Solutions.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2006

Micropreemption synthesis: an enabling mechanism for multitask VLSI systems.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2006

Latency-Guided On-Chip Bus-Network Design.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2006

Consistency Error Modeling-based Localization in Sensor Networks.
Proceedings of the Third Annual IEEE Communications Society Conference on Sensor, 2006

Optimal Worst-Case Coverage of Directional Field-of-View Sensor Networks.
Proceedings of the Third Annual IEEE Communications Society Conference on Sensor, 2006

Handheld System Energy Reduction by OS-Driven Refresh.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2006

Sleeping Coordination for Comprehensive Sensing Using Isotonic Regression and Domatic Partitions.
Proceedings of the INFOCOM 2006. 25th IEEE International Conference on Computer Communications, 2006

Location Discovery Using Data-Driven Statistical Error Modeling.
Proceedings of the INFOCOM 2006. 25th IEEE International Conference on Computer Communications, 2006

Consistency-Based On-line Localization in Sensor Networks.
Proceedings of the Distributed Computing in Sensor Systems, 2006

2005
Behavioral synthesis techniques for intellectual property protection.
ACM Trans. Design Autom. Electr. Syst., 2005

Worst and Best-Case Coverage in Sensor Networks.
IEEE Trans. Mob. Comput., 2005

Engineering change protocols for behavioral and system synthesis.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2005

Temporal properties of low power wireless links: modeling and implications on multi-hop routing.
Proceedings of the 6th ACM Interational Symposium on Mobile Ad Hoc Networking and Computing, 2005

Statistical model of lossy links in wireless sensor networks.
Proceedings of the Fourth International Symposium on Information Processing in Sensor Networks, 2005

Scheduling of Soft Real-Time Systems for Context-Aware Applications.
Proceedings of the 2005 Design, 2005

Flexible ASIC: shared masking for multiple media processors.
Proceedings of the 42nd Design Automation Conference, 2005

2004
Power minimization in QoS sensitive systems.
IEEE Trans. VLSI Syst., 2004

A heterogeneous built-in self-repair approach using system-level synthesis flexibility.
IEEE Trans. Reliability, 2004

Optimization-intensive watermarking techniques for decision problems.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2004

Optimizing designs using the addition of deflection operations.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2004

Fair watermarking using combinatorial isolation lemmas.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2004

Computational forensic techniques for intellectual property protection.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2004

Probabilistic constructive optimization techniques.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2004

Effective iterative techniques for fingerprinting design IP.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2004

Book review: Intellectual property protection in VLSI designs: Theory and practice, Hardcover, pp 183, plus XIX, Kluwer Academic Publishers, Boston, 2003, ISBN 1-4020-7320-8.
Microelectronics Reliability, 2004

Gateway Placement for Latency and Energy Efficient Data Aggregation.
Proceedings of the 29th Annual IEEE Conference on Local Computer Networks (LCN 2004), 2004

Relative Generic Computational Forensic Techniques.
Proceedings of the Information Hiding, 6th International Workshop, 2004

Wire-length prediction using statistical techniques.
Proceedings of the 2004 International Conference on Computer-Aided Design, 2004

2003
System synthesis of synchronous multimedia applications.
ACM Trans. Embedded Comput. Syst., 2003

Local watermarks: methodology and application to behavioral synthesis.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2003

Real-time watermarking techniques for sensor networks.
Proceedings of the Security and Watermarking of Multimedia Contents V, 2003

Minimal and maximal exposure path algorithms for wireless embedded sensor networks.
Proceedings of the 1st International Conference on Embedded Networked Sensor Systems, 2003

Model-based compression in wireless ad hoc networks.
Proceedings of the 1st International Conference on Embedded Networked Sensor Systems, 2003

Low power coordination in wireless ad-hoc networks.
Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003

Characterization of Location Error in Wireless Sensor Networks: Analysis and Applications.
Proceedings of the Information Processing in Sensor Networks, 2003

A Collaborative Approach to In-Place Sensor Calibration.
Proceedings of the Information Processing in Sensor Networks, 2003

Gradual Relaxation Techniques with Applications to Behavioral Synthesis.
Proceedings of the 2003 International Conference on Computer-Aided Design, 2003

PPM Model Cleaning.
Proceedings of the 2003 Data Compression Conference (DCC 2003), 2003

Design techniques for sensor appliances: foundations and light compass case study.
Proceedings of the 40th Design Automation Conference, 2003

An on-line approach for power minimization in QoS sensitive systems.
Proceedings of the 2003 Asia and South Pacific Design Automation Conference, 2003

2002
Exposure in Wireless Sensor Networks: Theory and Practical Solutions.
Wireless Networks, 2002

Techniques for energy-efficient communication pipeline design.
IEEE Trans. VLSI Syst., 2002

Watermarking graph partitioning solutions.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2002

Location errors in wireless embedded sensor networks: sources, models, and effects on applications.
Mobile Computing and Communications Review, 2002

Code Coverage-Based Power Estimation Techniques for Microprocessors.
Journal of Circuits, Systems, and Computers, 2002

On Communication Security in Wireless Ad-Hoc Sensor Networks.
Proceedings of the 11th IEEE International Workshops on Enabling Technologies: Infrastructure for Collaborative Enterprises (WETICE 2002), 2002

On the Sensitivity of Incremental Algorithms for Combinatorial Auctions.
Proceedings of the Fourth IEEE International Workshop on Advanced Issues of E-Commerce and Web-Based Information Systems (WECWIS'02), 2002

Hiding Data in DNA.
Proceedings of the Information Hiding, 5th International Workshop, 2002

System-Architectures for Sensor Networks Issues, Alternatives, and Directions.
Proceedings of the 20th International Conference on Computer Design (ICCD 2002), 2002

Search in sensor networks: Challenges, techniques, and applications.
Proceedings of the IEEE International Conference on Acoustics, 2002

Global error-tolerant algorithms for location discovery in ad-hoc wireless Netoworks.
Proceedings of the IEEE International Conference on Acoustics, 2002

Forward-looking objective functions: concept & applications in high level synthesis.
Proceedings of the 39th Design Automation Conference, 2002

Watermarking integer linear programming solutions.
Proceedings of the 39th Design Automation Conference, 2002

ILP-based engineering change.
Proceedings of the 39th Design Automation Conference, 2002

Enabling trusted software integrity.
Proceedings of the 10th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-X), 2002

2001
Exploring Hypermedia Processor Design Space.
VLSI Signal Processing, 2001

Exploring the diversity of multimedia systems.
IEEE Trans. VLSI Syst., 2001

Fingerprinting techniques for field-programmable gate arrayintellectual property protection.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2001

Symbolic debugging of embedded hardware and software.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2001

Constraint-based watermarking techniques for design IP protection.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2001

Localized algorithms in wireless ad-hoc networks: location discovery and sensor exposure.
Proceedings of the 2nd ACM Interational Symposium on Mobile Ad Hoc Networking and Computing, 2001

Smart kindergarten: sensor-based wireless networks for smart developmental problem-solving enviroments.
Proceedings of the MOBICOM 2001, 2001

Exposure in wireless Ad-Hoc sensor networks.
Proceedings of the MOBICOM 2001, 2001

Coverage Problems in Wireless Ad-hoc Sensor Networks.
Proceedings of the Proceedings IEEE INFOCOM 2001, 2001

Intellectual Property Metering.
Proceedings of the Information Hiding, 4th International Workshop, 2001

A Probabilistic Constructive Approach to Optimization Problems.
Proceedings of the 2001 IEEE/ACM International Conference on Computer-Aided Design, 2001

Power efficient organization of wireless sensor networks.
Proceedings of the IEEE International Conference on Communications, 2001

MetaCores: Design and Optimization Techniques.
Proceedings of the 38th Design Automation Conference, 2001

Hypermedia-Aided Design.
Proceedings of the 38th Design Automation Conference, 2001

2000
Cut-based functional debugging for programmable systems-on-chip.
IEEE Trans. VLSI Syst., 2000

Enhanced FPGA reliability through efficient run-time fault reconfiguration.
IEEE Trans. Reliability, 2000

Optimizing computations for effective block-processing.
ACM Trans. Design Autom. Electr. Syst., 2000

Maximally and arbitrarily fast implementation of linear andfeedback linear computations.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2000

Computer Aided Design of Fault-Tolerant Application Specific Programmable Processors.
IEEE Trans. Computers, 2000

Multimedia copyright enforcement on the Internet (panel session).
Proceedings of the 8th ACM International Conference on Multimedia 2000, Los Angeles, CA, USA, October 30, 2000

Achieving utility arbitrarily close to the optimal with limited energy.
Proceedings of the 2000 International Symposium on Low Power Electronics and Design, 2000

Energy minimization with guaranteed quality of service.
Proceedings of the 2000 International Symposium on Low Power Electronics and Design, 2000

Processors for Mobile Applications.
Proceedings of the IEEE International Conference On Computer Design: VLSI In Computers & Processors, 2000

Challenges and Opportunities in Broadband and Wireless Communication Designs.
Proceedings of the 2000 IEEE/ACM International Conference on Computer-Aided Design, 2000

Symbolic Debugging Scheme for Optimized Hardware and Software.
Proceedings of the 2000 IEEE/ACM International Conference on Computer-Aided Design, 2000

Latency-Guided On-Chip Bus Network Design.
Proceedings of the 2000 IEEE/ACM International Conference on Computer-Aided Design, 2000

Localized watermarking: methodology and application to template mapping.
Proceedings of the IEEE International Conference on Acoustics, 2000

Fingerprinting intellectual property using constraint-addition.
Proceedings of the 37th Conference on Design Automation, 2000

Function-level power estimation methodology for microprocessors.
Proceedings of the 37th Conference on Design Automation, 2000

Watermarking while preserving the critical path.
Proceedings of the 37th Conference on Design Automation, 2000

Efficient error detection, localization, and correction for FPGA-based debugging.
Proceedings of the 37th Conference on Design Automation, 2000

Forensic engineering techniques for VLSI CAD tools.
Proceedings of the 37th Conference on Design Automation, 2000

Fair watermarking techniques.
Proceedings of ASP-DAC 2000, 2000

A technique for QoS-based system partitioning.
Proceedings of ASP-DAC 2000, 2000

Symbolic debugging of globally optimized behavioral specifications.
Proceedings of ASP-DAC 2000, 2000

1999
A methodology and algorithms for the design of hard real-time multitasking ASICs.
ACM Trans. Design Autom. Electr. Syst., 1999

Power optimization using divide-and-conquer techniques for minimization of the number of operations.
ACM Trans. Design Autom. Electr. Syst., 1999

Algorithm selection: a quantitative optimization-intensive approach.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1999

Improving the observability and controllability of datapaths foremulation-based debugging.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1999

Application-driven synthesis of memory-intensive systems-on-chip.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1999

Power optimization of variable-voltage core-based systems.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1999

Low power and QoS.
IEEE Concurrency, 1999

Synthesis of Hard Real-Time Application Specific Systems.
Design Autom. for Emb. Sys., 1999

Efficient Block Scheduling to Minimize Context Switching Time for Programmable Embedded Processors.
Design Autom. for Emb. Sys., 1999

Semantic Multicast: Intelligently Sharing Collaborative Sessions.
ACM Comput. Surv., 1999

System Synthesis of Synchronous Multimedia Applications.
Proceedings of the 12th International Symposium on System Synthesis, 1999

Designing power efficient hypermedia processors.
Proceedings of the 1999 International Symposium on Low Power Electronics and Design, 1999

Energy minimization of system pipelines using multiple voltages.
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

Hiding Signatures in Graph Coloring Solutions.
Proceedings of the Information Hiding, Third International Workshop, 1999

Enhanced Intellectual Property Protection for Digital Circuits on Programmable Hardware.
Proceedings of the Information Hiding, Third International Workshop, 1999

Power minimization using system-level partitioning of applications with quality of service requirements.
Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided Design, 1999

Localized watermarking: methodology and application to operation scheduling.
Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided Design, 1999

Copy detection for intellectual property protection of VLSI designs.
Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided Design, 1999

Throughput optimization of general non-linear computations.
Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided Design, 1999

Engineering change protocols for behavioral synthesis.
Proceedings of the 1999 IEEE International Conference on Acoustics, 1999

Synthesis of DSP soft real-time multiprocessor systems-on-silicon.
Proceedings of the 1999 IEEE International Conference on Acoustics, 1999

Efficient Support of Hardware Debugging Through FPGA Physical Design Partitioning.
Proceedings of the 1999 ACM/SIGDA Seventh International Symposium on Field Programmable Gate Arrays, 1999

Algorithms for Efficient Runtime Fault Recovery on Diverse FPGA Architectures.
Proceedings of the 14th International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT '99), 1999

Robust FPGA Intellectual Property Protection Through Multiple Small Watermarks.
Proceedings of the 36th Conference on Design Automation, 1999

Engineering Change: Methodology and Applications to Behavioral and System Synthesis.
Proceedings of the 36th Conference on Design Automation, 1999

Power Efficient Mediaprocessors: Design Space Exploration.
Proceedings of the 36th Conference on Design Automation, 1999

Behavioral Synthesis Techniques for Intellectual Property Protection.
Proceedings of the 36th Conference on Design Automation, 1999

Low-Power Behavioral Synthesis Optimization Using Multiple Precision Arithmetic.
Proceedings of the 36th Conference on Design Automation, 1999

1998
On-line fault detection for bus-based field programmable gate arrays.
IEEE Trans. VLSI Syst., 1998

Low overhead fault-tolerant FPGA systems.
IEEE Trans. VLSI Syst., 1998

Behavioral-level synthesis of heterogeneous BISR reconfigurable ASIC's.
IEEE Trans. VLSI Syst., 1998

Behavioral optimization using the manipulation of timing constraints.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1998

A controller redesign technique to enhance testability of controller-data path circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1998

High-level synthesis techniques for functional test pattern execution1.
Integration, 1998

Synthesis Techniques for Low-Power Hard Real-Time Systems on Variable Voltage Processors.
Proceedings of the 19th IEEE Real-Time Systems Symposium, 1998

Hypermedia processors: design space exploration.
Proceedings of the Second IEEE Workshop on Multimedia Signal Processing, 1998

Fingerprinting Digital Circuits on Programmable Hardware.
Proceedings of the Information Hiding, 1998

Techniques for energy minimization of communication pipelines.
Proceedings of the 1998 IEEE/ACM International Conference on Computer-Aided Design, 1998

Analysis of watermarking techniques for graph coloring problem.
Proceedings of the 1998 IEEE/ACM International Conference on Computer-Aided Design, 1998

A quantitative approach to development and validation of synthetic benchmarks for behavioral synthesis.
Proceedings of the 1998 IEEE/ACM International Conference on Computer-Aided Design, 1998

Signature hiding techniques for FPGA intellectual property protection.
Proceedings of the 1998 IEEE/ACM International Conference on Computer-Aided Design, 1998

Functional debugging of systems-on-chip.
Proceedings of the 1998 IEEE/ACM International Conference on Computer-Aided Design, 1998

Intellectual property protection by watermarking combinational logic synthesis solutions.
Proceedings of the 1998 IEEE/ACM International Conference on Computer-Aided Design, 1998

Real-time operating systems for embedded computing.
Proceedings of the 1998 IEEE/ACM International Conference on Computer-Aided Design, 1998

On-line scheduling of hard real-time tasks on variable voltage processor.
Proceedings of the 1998 IEEE/ACM International Conference on Computer-Aided Design, 1998

Techniques for intellectual property protection of DSP designs.
Proceedings of the 1998 IEEE International Conference on Acoustics, 1998

Behavioral synthesis optimization using multiple precision arithmetic.
Proceedings of the 1998 IEEE International Conference on Acoustics, 1998

Efficiently Supporting Fault-Tolerance in FPGAs.
Proceedings of the 1998 ACM/SIGDA Sixth International Symposium on Field Programmable Gate Arrays, 1998

Media Architecture: General Purpose vs. Multiple Application-Specific Programmable Processor.
Proceedings of the 35th Conference on Design Automation, 1998

Efficient Coloring of a Large Spectrum of Graphs.
Proceedings of the 35th Conference on Design Automation, 1998

Robust IP Watermarking Methodologies for Physical Design.
Proceedings of the 35th Conference on Design Automation, 1998

Watermarking Techniques for Intellectual Property Protection.
Proceedings of the 35th Conference on Design Automation, 1998

A Methodology for Guided Behavioral-Level Optimization.
Proceedings of the 35th Conference on Design Automation, 1998

Quantitative Selection of Media Benchmarks.
Proceedings of the ASP-DAC '98, 1998

Synthesis of Power Efficient Systems-on-Silicon.
Proceedings of the ASP-DAC '98, 1998

Heterogeneous BISR-approach using System Level Synthesis Flexibility.
Proceedings of the ASP-DAC '98, 1998

Techniques for Functional Test Pattern Execution.
Proceedings of the ASP-DAC '98, 1998

1997
Nonscan design-for-testability techniques using RT-level design information.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1997

MediaBench: A Tool for Evaluating and Synthesizing Multimedia and Communicatons Systems.
Proceedings of the Thirtieth Annual IEEE/ACM International Symposium on Microarchitecture, 1997

Real-Time Operating Systems for Embedded Computing.
Proceedings of the Proceedings 1997 International Conference on Computer Design: VLSI in Computers & Processors, 1997

A quantitative approach to functional debugging.
Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, 1997

Application-driven synthesis of core-based systems.
Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, 1997

Micro-preemption synthesis: an enabling mechanism for multi-task VLSI systems.
Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, 1997

DSP Quant: design, validation, and applications of DSP hard real-time benchmark.
Proceedings of the 1997 IEEE International Conference on Acoustics, 1997

Minimizing the number of operations in DSP computations.
Proceedings of the 1997 IEEE International Conference on Acoustics, 1997

Methodology for Behavioral Synthesis-Based Algorithm-Level Design Space Exploration: DCT Case Study.
Proceedings of the 34st Conference on Design Automation, 1997

System-Level Synthesis of Low-Power Hard Real-Time Systems.
Proceedings of the 34st Conference on Design Automation, 1997

Synthesis of Application Specific Programmable Processors.
Proceedings of the 34st Conference on Design Automation, 1997

Potential-Driven Statistical Ordering of Transformations.
Proceedings of the 34st Conference on Design Automation, 1997

Fault Scanner for Reconfigurable Logic.
Proceedings of the 17th Conference on Advanced Research in VLSI (ARVLSI '97), 1997

1996
Multiple constant multiplications: efficient and versatile framework and algorithms for exploring common subexpression elimination.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1996

Performance optimization using template mapping for datapath-intensive high-level synthesis.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1996

System-Level Synthesis of Application Specific Systems using A* Search and Generalized Force-Directed Heuristics.
Proceedings of the 9th International Symposium on System Synthesis, 1996

Throughput Optimization in Disk-Based Real-Time Application Specific Systems.
Proceedings of the 9th International Symposium on System Synthesis, 1996

Heterogeneous built-in resiliency of application specific programmable processors.
Proceedings of the 1996 IEEE/ACM International Conference on Computer-Aided Design, 1996

Power optimization in disk-based real-time application specific systems.
Proceedings of the 1996 IEEE/ACM International Conference on Computer-Aided Design, 1996

Knowledge-based transformation ordering.
Proceedings of the 1996 IEEE International Conference on Acoustics, 1996

Heuristic techniques for synthesis of hard real-time DSP application specific systems.
Proceedings of the 1996 IEEE International Conference on Acoustics, 1996

Configurable Spare Processors: A New Approach to System Level-Fault Tolerance.
Proceedings of the 1996 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 1996

Power Optimization in Programmable Processors and ASIC Implementations of Linear Systems: Transformation-based Approach.
Proceedings of the 33st Conference on Design Automation, 1996

Optimizing Systems for Effective Block-Processing: The k-Delay Problem.
Proceedings of the 33st Conference on Design Automation, 1996

1995
Optimum and heuristic transformation techniques for simultaneous optimization of latency and throughput.
IEEE Trans. VLSI Syst., 1995

Behavioral synthesis of area-efficient testable designs using interaction between hardware sharing and partial scan.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1995

Considering testability at behavioral level: use of transformations for partial scan cost minimization under timing and area constraints.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1995

Optimizing power using transformations.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1995

Synthesis and selection of DCT algorithms using behavioral synthesis-based algorithm space exploration.
Proceedings of the Proceedings 1995 International Conference on Image Processing, 1995

Discrete-relaxation-based heuristic techniques for video algorithm/architecture matching and system level transformations.
Proceedings of the Proceedings 1995 International Conference on Image Processing, 1995

Cost optimization in ASIC implementation of periodic hard-real time systems using behavioral synthesis techniques.
Proceedings of the 1995 IEEE/ACM International Conference on Computer-Aided Design, 1995

Design-for-debugging of application specific designs.
Proceedings of the 1995 IEEE/ACM International Conference on Computer-Aided Design, 1995

A controller-based design-for-testability technique for controller-data path circuits.
Proceedings of the 1995 IEEE/ACM International Conference on Computer-Aided Design, 1995

Efficient throughput optimization of feedback linear computations using generalized Horner's scheme.
Proceedings of the 1995 International Conference on Acoustics, 1995

Power minimization in DSP application specific systems using algorithm selection.
Proceedings of the 1995 International Conference on Acoustics, 1995

Rephasing: A Transformation Technique for the Manipulation of Timing Constraints.
Proceedings of the 32st Conference on Design Automation, 1995

Optimal ILP-Based Approach for Throughput Optimization Using Simultaneous Algorithm/Architecture Matching and Retiming.
Proceedings of the 32st Conference on Design Automation, 1995

Synthesis-for-testability using transformations.
Proceedings of the 1995 Conference on Asia Pacific Design Automation, Makuhari, Massa, Chiba, Japan, August 29, 1995

1994
Optimizing throughput and resource utilization using pipelining: Transformation based approach.
VLSI Signal Processing, 1994

Estimating implementation bounds for real time DSP application specific circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1994

Optimizing resource utilization using transformations.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1994

Synthesizing designs with low-cardinality minimum feedback vertex set for partial scan application.
Proceedings of the 12th IEEE VLSI Test Symposium (VTS'94), 1994

Transforming Behavioral Specifications to Facilitate Synthesis of Testable Designs.
Proceedings of the Proceedings IEEE International Test Conference 1994, 1994

Algorithm selection: a quantitative computation-intensive optimization approach.
Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994

Non-scan design-for-testability of RT-level data paths.
Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994

Design of high throughput, low latency and low cost structures for linear systems.
Proceedings of ICASSP '94: IEEE International Conference on Acoustics, 1994

Concurrency characteristics in DSP programs.
Proceedings of ICASSP '94: IEEE International Conference on Acoustics, 1994

Behavioral synthesis of low-cost partial scan designs for DSP applications.
Proceedings of ICASSP '94: IEEE International Conference on Acoustics, 1994

Transforming Linear Systems for Joint Latency and Throughout Optimization.
Proceedings of the EDAC - The European Conference on Design Automation, ETC - European Test Conference, EUROASIC - The European Event in ASIC Design, Proceedings, February 28, 1994

Efficient Substitution of Multiple Constant Multiplications by Shifts and Additions Using Iterative Pairwise Matching.
Proceedings of the 31st Conference on Design Automation, 1994

Optimizing Resource Utilization and Testability Using Hot Potato Techniques.
Proceedings of the 31st Conference on Design Automation, 1994

Behavioral synthesis of high performance, low cost, and low power application specific processors for linear computations.
Proceedings of the International Conference on Application Specific Array Processors, 1994

1993
High Performance Embedded System Optimization Using Algebraic and Generalized Retiming Techniques.
Proceedings of the Proceedings 1993 International Conference on Computer Design: VLSI in Computers & Processors, 1993

High level synthesis for reconfigurable datapath structures.
Proceedings of the 1993 IEEE/ACM International Conference on Computer-Aided Design, 1993

Exploiting hardware sharing in high-level synthesis for partial scan optimization.
Proceedings of the 1993 IEEE/ACM International Conference on Computer-Aided Design, 1993

Instruction set mapping for performance optimization.
Proceedings of the 1993 IEEE/ACM International Conference on Computer-Aided Design, 1993

On unlimited parallelism of DSP arithmetic computations.
Proceedings of the IEEE International Conference on Acoustics, 1993

High Level Synthesis Techniques for Efficient Built-In-Self Repair.
Proceedings of the IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems, 1993

Critical Path Minimization Using Retiming and Algebraic Speed-Up.
Proceedings of the 30th Design Automation Conference. Dallas, 1993

Sequential Circuit Delay optimization Using Global Path Delays.
Proceedings of the 30th Design Automation Conference. Dallas, 1993

Heterogeneous BISR techniques for yield and reliability enhancement using high level synthesis transformations.
Proceedings of the International Conference on Application-Specific Array Processors, 1993

1992
Scheduling Algorithms For Hierarchical Data Control Flow Graphs.
I. J. Circuit Theory and Applications, 1992

Maximally fast and arbitrarily fast implementation of linear computations.
Proceedings of the 1992 IEEE/ACM International Conference on Computer-Aided Design, 1992

Performance optimization of sequential circuits by eliminating retiming bottlenecks.
Proceedings of the 1992 IEEE/ACM International Conference on Computer-Aided Design, 1992

HYPER-LP: a system for power minimization using architectural transformations.
Proceedings of the 1992 IEEE/ACM International Conference on Computer-Aided Design, 1992

1991
Fast Prototyping of Datapath-Intensive Architectures.
IEEE Design & Test of Computers, 1991

1989
A Scheduling and Resource Allocation Algorithm for Hierarchical Signal Flow Graphs.
Proceedings of the 26th ACM/IEEE Design Automation Conference, 1989


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