Wen-Shen Chou

According to our database, Wen-Shen Chou authored at least 5 papers between 2007 and 2013.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2013

Embedded fully self-biased switched-capacitor for energy and area-efficient cholesteric LCD drivers.

Wen-Shen Chou, Po-Hsien Huang, Ming-Yan Fan, Ke-Horng Chen, Kuei-Ann Wen, Zhih Han Tai, Yi Hsuan Cheng, Chi Chung Tsai, Hsin-Yu Luo, Shih-Ming Wang, Long-Der Chen, Cheng-Chen Yang, Jui-Lung Chen

Proceedings of the ESSCIRC 2013, 2013

2012

An Embedded Dynamic Voltage Scaling (DVS) System Through 55 nm Single-Inductor Dual-Output (SIDO) Switching Converter for 12-Bit Video Digital-to-Analog Converter.

Wen-Shen Chou, Tzu-Chi Huang, Yu-Huei Lee, Yao-Yi Yang, Yi-Ping Su, Ke-Horng Chen, Chen-Chih Huang, Ying-Hsi Lin, Chao-Cheng Lee, Kuei-Ann Wen, Ying-Chih Hsu, Yung-Chow Peng, Fu-Lung Hsueh

IEEE J. Solid State Circuits, 2012

2011

Minimized Transient and Steady-State Cross Regulation in 55-nm CMOS Single-Inductor Dual-Output (SIDO) Step-Down DC-DC Converter.

Yu-Huei Lee, Tzu-Chi Huang, Yao-Yi Yang, Wen-Shen Chou, Ke-Horng Chen, Chen-Chih Huang, Ying-Hsi Lin

IEEE J. Solid State Circuits, 2011

55nm CMOS 12-bit 250MHz digital-to-analog converter with dynamic voltage scaling (DVS) technique through single-inductor dual-output (SIDO) converter.

Tzu-Chi Huang, Wen-Shen Chou, Yu-Huei Lee, Yao-Yi Yang, Ke-Horng Chen, Yung-Chow Peng, Fu-Lung Hsueh

Proceedings of the 37th European Solid-State Circuits Conference, 2011

2007

A Low-Cost Triple-Channel 10-bit 250MHz DAC IP in 65nm CMOS Process.

Wen-Shen Chou, Shu-Chieh Yang, Fu-Lung Hsueh, Heng-Chang Huang, Chih-Ji Hsiao

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007