William K. C. Lam

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1996

1995

Delay fault coverage, test set size, and performance trade-offs.

[BibT_eX]

[DOI]

Alexander Saldanha

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1995

1994

Exact Minimum Cycle Times for Finite State Machines.

[BibT_eX]

[DOI]

Proceedings of the 31st Conference on Design Automation, 1994

Criteria for the Simple Path Property in Timed Automata.

[BibT_eX]

[DOI]

Proceedings of the Computer Aided Verification, 6th International Conference, 1994

Timed Boolean functions - a unified formalism for exact timing analysis.

[BibT_eX]

The Kluwer international series in engineering and computer science 270, Kluwer, ISBN: 978-0-7923-9454-9, 1994

1993

Delay Fault Coverage and Performance Tradeoffs.

[BibT_eX]

[DOI]

Alexander Saldanha

Proceedings of the 30th Design Automation Conference. Dallas, 1993

Circuit Delay Models and Their Exact Computation Using Timed Boolean Functions.

[BibT_eX]

[DOI]

Proceedings of the 30th Design Automation Conference. Dallas, 1993

Alternating RQ Timed Automata.

[BibT_eX]

[DOI]

Proceedings of the Computer Aided Verification, 5th International Conference, 1993

1992

On Relationship Between ITE and BDD.

[BibT_eX]

[DOI]

Proceedings of the Proceedings 1992 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1992

Valid clocking in wavepipelined circuits.

[BibT_eX]

[DOI]