Wissem Chouchene

According to our database1, Wissem Chouchene authored at least 4 papers between 2010 and 2017.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2017
Vers une reconfiguration dynamique partielle parallèle par prise en compte de la régularité des architectures FPGA-Xilinx. (Towards a parallel partial dynamic reconfiguration by taking into account the regularity of FPGA-Xilinx architectures).
PhD thesis, 2017

2016
AFFORDe: Automatic Allocation and Floorplanning for SPMD Architecture.
Proceedings of the 10th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2016

2013
VCRBCM: A low latency virtual channel router architecture based on blocking controller manger.
Proceedings of the 10th International Multi-Conferences on Systems, Signals & Devices, 2013

2010
Design and implementation of low latency network interface for network on chip.
Proceedings of the 5th International Design and Test Workshop, 2010


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